diff --git a/.gitignore b/.gitignore index c6127b38c..7f6b53fd6 100644 --- a/.gitignore +++ b/.gitignore @@ -50,3 +50,4 @@ modules.order Module.symvers Mkfile.old dkms.conf +/.metadata/ diff --git a/Ejercicio_delayNB_1/.settings/language.settings.xml b/Ejercicio_delayNB_1/.settings/language.settings.xml index 47b3fc15a..4305a264b 100644 --- a/Ejercicio_delayNB_1/.settings/language.settings.xml +++ b/Ejercicio_delayNB_1/.settings/language.settings.xml @@ -5,8 +5,7 @@ - - + @@ -18,7 +17,7 @@ - + diff --git a/Ejercicio_delayNB_1/Debug/Drivers/BSP/STM32F4xx_Nucleo_144/subdir.mk b/Ejercicio_delayNB_1/Debug/Drivers/BSP/STM32F4xx_Nucleo_144/subdir.mk index b6ad139e5..dad347f46 100644 --- a/Ejercicio_delayNB_1/Debug/Drivers/BSP/STM32F4xx_Nucleo_144/subdir.mk +++ b/Ejercicio_delayNB_1/Debug/Drivers/BSP/STM32F4xx_Nucleo_144/subdir.mk @@ -1,6 +1,6 @@ ################################################################################ # Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +# Toolchain: GNU Tools for STM32 (10.3-2021.10) ################################################################################ # Add inputs and outputs from these tool invocations to the build variables @@ -15,6 +15,13 @@ C_DEPS += \ # Each subdirectory must supply rules for building sources it contributes -Drivers/BSP/STM32F4xx_Nucleo_144/%.o: ../Drivers/BSP/STM32F4xx_Nucleo_144/%.c Drivers/BSP/STM32F4xx_Nucleo_144/subdir.mk - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32 -DSTM32F429ZITx -DSTM32F4 -DNUCLEO_F429ZI -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Inc -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/STM32F4xx_HAL_Driver/Inc" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Include" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Device/ST/STM32F4xx/Include" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/BSP/STM32F4xx_Nucleo_144" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/Core/Inc" -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/BSP/STM32F4xx_Nucleo_144/%.o Drivers/BSP/STM32F4xx_Nucleo_144/%.su Drivers/BSP/STM32F4xx_Nucleo_144/%.cyclo: ../Drivers/BSP/STM32F4xx_Nucleo_144/%.c Drivers/BSP/STM32F4xx_Nucleo_144/subdir.mk + arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32 -DSTM32F429ZITx -DSTM32F4 -DNUCLEO_F429ZI -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Inc -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/STM32F4xx_HAL_Driver/Inc" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Include" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Device/ST/STM32F4xx/Include" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/BSP/STM32F4xx_Nucleo_144" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/Core/Inc" -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" + +clean: clean-Drivers-2f-BSP-2f-STM32F4xx_Nucleo_144 + +clean-Drivers-2f-BSP-2f-STM32F4xx_Nucleo_144: + -$(RM) ./Drivers/BSP/STM32F4xx_Nucleo_144/stm32f4xx_nucleo_144.cyclo ./Drivers/BSP/STM32F4xx_Nucleo_144/stm32f4xx_nucleo_144.d ./Drivers/BSP/STM32F4xx_Nucleo_144/stm32f4xx_nucleo_144.o ./Drivers/BSP/STM32F4xx_Nucleo_144/stm32f4xx_nucleo_144.su + +.PHONY: clean-Drivers-2f-BSP-2f-STM32F4xx_Nucleo_144 diff --git a/Ejercicio_delayNB_1/Debug/Drivers/CMSIS/subdir.mk b/Ejercicio_delayNB_1/Debug/Drivers/CMSIS/subdir.mk index 0ce2841f0..2ed0562b8 100644 --- a/Ejercicio_delayNB_1/Debug/Drivers/CMSIS/subdir.mk +++ b/Ejercicio_delayNB_1/Debug/Drivers/CMSIS/subdir.mk @@ -1,6 +1,6 @@ ################################################################################ # Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +# Toolchain: GNU Tools for STM32 (10.3-2021.10) ################################################################################ # Add inputs and outputs from these tool invocations to the build variables @@ -15,6 +15,13 @@ C_DEPS += \ # Each subdirectory must supply rules for building sources it contributes -Drivers/CMSIS/%.o: ../Drivers/CMSIS/%.c Drivers/CMSIS/subdir.mk - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32 -DSTM32F429ZITx -DSTM32F4 -DNUCLEO_F429ZI -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Inc -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/STM32F4xx_HAL_Driver/Inc" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Include" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Device/ST/STM32F4xx/Include" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/BSP/STM32F4xx_Nucleo_144" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/Core/Inc" -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/CMSIS/%.o Drivers/CMSIS/%.su Drivers/CMSIS/%.cyclo: ../Drivers/CMSIS/%.c Drivers/CMSIS/subdir.mk + arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32 -DSTM32F429ZITx -DSTM32F4 -DNUCLEO_F429ZI -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Inc -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/STM32F4xx_HAL_Driver/Inc" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Include" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Device/ST/STM32F4xx/Include" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/BSP/STM32F4xx_Nucleo_144" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/Core/Inc" -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" + +clean: clean-Drivers-2f-CMSIS + +clean-Drivers-2f-CMSIS: + -$(RM) ./Drivers/CMSIS/system_stm32f4xx.cyclo ./Drivers/CMSIS/system_stm32f4xx.d ./Drivers/CMSIS/system_stm32f4xx.o ./Drivers/CMSIS/system_stm32f4xx.su + +.PHONY: clean-Drivers-2f-CMSIS diff --git a/Ejercicio_delayNB_1/Debug/Drivers/Core/Src/subdir.mk b/Ejercicio_delayNB_1/Debug/Drivers/Core/Src/subdir.mk index 12f6ff832..2e18e21c3 100644 --- a/Ejercicio_delayNB_1/Debug/Drivers/Core/Src/subdir.mk +++ b/Ejercicio_delayNB_1/Debug/Drivers/Core/Src/subdir.mk @@ -1,6 +1,6 @@ ################################################################################ # Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +# Toolchain: GNU Tools for STM32 (10.3-2021.10) ################################################################################ # Add inputs and outputs from these tool invocations to the build variables @@ -21,6 +21,13 @@ C_DEPS += \ # Each subdirectory must supply rules for building sources it contributes -Drivers/Core/Src/%.o: ../Drivers/Core/Src/%.c Drivers/Core/Src/subdir.mk - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32 -DSTM32F429ZITx -DSTM32F4 -DNUCLEO_F429ZI -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Inc -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/STM32F4xx_HAL_Driver/Inc" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Include" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Device/ST/STM32F4xx/Include" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/BSP/STM32F4xx_Nucleo_144" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/Core/Inc" -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/Core/Src/%.o Drivers/Core/Src/%.su Drivers/Core/Src/%.cyclo: ../Drivers/Core/Src/%.c Drivers/Core/Src/subdir.mk + arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32 -DSTM32F429ZITx -DSTM32F4 -DNUCLEO_F429ZI -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Inc -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/STM32F4xx_HAL_Driver/Inc" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Include" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Device/ST/STM32F4xx/Include" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/BSP/STM32F4xx_Nucleo_144" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/Core/Inc" -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" + +clean: clean-Drivers-2f-Core-2f-Src + +clean-Drivers-2f-Core-2f-Src: + -$(RM) ./Drivers/Core/Src/stm32f4xx_it.cyclo ./Drivers/Core/Src/stm32f4xx_it.d ./Drivers/Core/Src/stm32f4xx_it.o ./Drivers/Core/Src/stm32f4xx_it.su ./Drivers/Core/Src/syscalls.cyclo ./Drivers/Core/Src/syscalls.d ./Drivers/Core/Src/syscalls.o ./Drivers/Core/Src/syscalls.su ./Drivers/Core/Src/sysmem.cyclo ./Drivers/Core/Src/sysmem.d ./Drivers/Core/Src/sysmem.o ./Drivers/Core/Src/sysmem.su + +.PHONY: clean-Drivers-2f-Core-2f-Src diff --git a/Ejercicio_delayNB_1/Debug/Drivers/STM32F4xx_HAL_Driver/Src/Legacy/subdir.mk b/Ejercicio_delayNB_1/Debug/Drivers/STM32F4xx_HAL_Driver/Src/Legacy/subdir.mk index a9155a6f3..2aaa327ae 100644 --- a/Ejercicio_delayNB_1/Debug/Drivers/STM32F4xx_HAL_Driver/Src/Legacy/subdir.mk +++ b/Ejercicio_delayNB_1/Debug/Drivers/STM32F4xx_HAL_Driver/Src/Legacy/subdir.mk @@ -1,6 +1,6 @@ ################################################################################ # Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +# Toolchain: GNU Tools for STM32 (10.3-2021.10) ################################################################################ # Add inputs and outputs from these tool invocations to the build variables @@ -15,6 +15,13 @@ C_DEPS += \ # Each subdirectory must supply rules for building sources it contributes -Drivers/STM32F4xx_HAL_Driver/Src/Legacy/%.o: ../Drivers/STM32F4xx_HAL_Driver/Src/Legacy/%.c Drivers/STM32F4xx_HAL_Driver/Src/Legacy/subdir.mk - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32 -DSTM32F429ZITx -DSTM32F4 -DNUCLEO_F429ZI -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Inc -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/STM32F4xx_HAL_Driver/Inc" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Include" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Device/ST/STM32F4xx/Include" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/BSP/STM32F4xx_Nucleo_144" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/Core/Inc" -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F4xx_HAL_Driver/Src/Legacy/%.o Drivers/STM32F4xx_HAL_Driver/Src/Legacy/%.su Drivers/STM32F4xx_HAL_Driver/Src/Legacy/%.cyclo: ../Drivers/STM32F4xx_HAL_Driver/Src/Legacy/%.c Drivers/STM32F4xx_HAL_Driver/Src/Legacy/subdir.mk + arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32 -DSTM32F429ZITx -DSTM32F4 -DNUCLEO_F429ZI -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Inc -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/STM32F4xx_HAL_Driver/Inc" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Include" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Device/ST/STM32F4xx/Include" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/BSP/STM32F4xx_Nucleo_144" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/Core/Inc" -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" + +clean: clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src-2f-Legacy + +clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src-2f-Legacy: + -$(RM) ./Drivers/STM32F4xx_HAL_Driver/Src/Legacy/stm32f4xx_hal_can.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/Legacy/stm32f4xx_hal_can.d ./Drivers/STM32F4xx_HAL_Driver/Src/Legacy/stm32f4xx_hal_can.o ./Drivers/STM32F4xx_HAL_Driver/Src/Legacy/stm32f4xx_hal_can.su + +.PHONY: clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src-2f-Legacy diff --git a/Ejercicio_delayNB_1/Debug/Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk b/Ejercicio_delayNB_1/Debug/Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk index e1933a29f..49707c5ea 100644 --- a/Ejercicio_delayNB_1/Debug/Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk +++ b/Ejercicio_delayNB_1/Debug/Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk @@ -1,6 +1,6 @@ ################################################################################ # Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +# Toolchain: GNU Tools for STM32 (10.3-2021.10) ################################################################################ # Add inputs and outputs from these tool invocations to the build variables @@ -46,6 +46,7 @@ C_SRCS += \ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c \ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.c \ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_mmc.c \ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp.c \ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp_template.c \ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.c \ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.c \ @@ -139,6 +140,7 @@ OBJS += \ ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o \ ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.o \ ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_mmc.o \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp.o \ ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp_template.o \ ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.o \ ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.o \ @@ -232,6 +234,7 @@ C_DEPS += \ ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.d \ ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.d \ ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_mmc.d \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp.d \ ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp_template.d \ ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.d \ ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.d \ @@ -285,6 +288,16 @@ C_DEPS += \ # Each subdirectory must supply rules for building sources it contributes -Drivers/STM32F4xx_HAL_Driver/Src/%.o: ../Drivers/STM32F4xx_HAL_Driver/Src/%.c Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32 -DSTM32F429ZITx -DSTM32F4 -DNUCLEO_F429ZI -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Inc -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/STM32F4xx_HAL_Driver/Inc" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Include" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Device/ST/STM32F4xx/Include" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/BSP/STM32F4xx_Nucleo_144" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/Core/Inc" -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" +Drivers/STM32F4xx_HAL_Driver/Src/%.o Drivers/STM32F4xx_HAL_Driver/Src/%.su Drivers/STM32F4xx_HAL_Driver/Src/%.cyclo: ../Drivers/STM32F4xx_HAL_Driver/Src/%.c Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk + arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32 -DSTM32F429ZITx -DSTM32F4 -DNUCLEO_F429ZI -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Inc -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/STM32F4xx_HAL_Driver/Inc" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Include" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Device/ST/STM32F4xx/Include" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/BSP/STM32F4xx_Nucleo_144" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/Core/Inc" -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" + +clean: clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src + +clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src: + -$(RM) ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cec.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cec.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cec.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cec.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dcmi.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dcmi.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dcmi.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dcmi.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dcmi_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dcmi_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dcmi_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dcmi_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dfsdm.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dfsdm.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dfsdm.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dfsdm.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpi2c.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpi2c.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpi2c.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpi2c.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpi2c_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpi2c_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpi2c_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpi2c_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpsmbus.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpsmbus.d + -$(RM) ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpsmbus.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpsmbus.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpsmbus_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpsmbus_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpsmbus_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_fmpsmbus_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_irda.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_irda.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_irda.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_irda.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_lptim.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_lptim.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_lptim.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_lptim.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_mmc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_mmc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_mmc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_mmc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp_template.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp_template.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp_template.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp_template.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.su + -$(RM) ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sai.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sai.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sai.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sai.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sai_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sai_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sai_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sai_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_smartcard.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_smartcard.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_smartcard.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_smartcard.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_smbus.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_smbus.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_smbus.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_smbus.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spdifrx.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spdifrx.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spdifrx.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spdifrx.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_usart.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_usart.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_usart.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_usart.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_wwdg.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_wwdg.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_wwdg.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_wwdg.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_crc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_crc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_crc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_crc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dac.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dac.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dac.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dac.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma2d.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma2d.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma2d.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma2d.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_exti.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_exti.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_exti.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_exti.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.su + -$(RM) ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmpi2c.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmpi2c.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmpi2c.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmpi2c.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_gpio.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_gpio.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_gpio.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_gpio.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_i2c.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_i2c.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_i2c.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_i2c.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_lptim.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_lptim.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_lptim.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_lptim.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_pwr.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_pwr.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_pwr.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_pwr.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rcc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rcc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rcc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rcc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rng.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rng.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rng.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rng.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rtc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rtc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rtc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rtc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_sdmmc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_sdmmc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_sdmmc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_sdmmc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_spi.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_spi.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_spi.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_spi.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_tim.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_tim.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_tim.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_tim.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usart.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usart.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usart.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usart.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_utils.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_utils.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_utils.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_utils.su + +.PHONY: clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src diff --git a/Ejercicio_delayNB_1/Debug/Ejercicio_delayNB_1.list b/Ejercicio_delayNB_1/Debug/Ejercicio_delayNB_1.list index 4615f397e..8563d4ebb 100644 --- a/Ejercicio_delayNB_1/Debug/Ejercicio_delayNB_1.list +++ b/Ejercicio_delayNB_1/Debug/Ejercicio_delayNB_1.list @@ -5,21 +5,21 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001ac 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 000016e0 080001ac 080001ac 000101ac 2**2 + 1 .text 00001734 080001ac 080001ac 000101ac 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000018 0800188c 0800188c 0001188c 2**2 + 2 .rodata 00000018 080018e0 080018e0 000118e0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 080018a4 080018a4 00020018 2**0 + 3 .ARM.extab 00000000 080018f8 080018f8 00020018 2**0 CONTENTS - 4 .ARM 00000008 080018a4 080018a4 000118a4 2**2 + 4 .ARM 00000008 080018f8 080018f8 000118f8 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 080018ac 080018ac 00020018 2**0 + 5 .preinit_array 00000000 08001900 08001900 00020018 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 080018ac 080018ac 000118ac 2**2 + 6 .init_array 00000004 08001900 08001900 00011900 2**2 CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000004 080018b0 080018b0 000118b0 2**2 + 7 .fini_array 00000004 08001904 08001904 00011904 2**2 CONTENTS, ALLOC, LOAD, DATA - 8 .data 00000018 20000000 080018b4 00020000 2**2 + 8 .data 00000018 20000000 08001908 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .ccmram 00000000 10000000 10000000 00020018 2**0 CONTENTS @@ -29,23 +29,23 @@ Idx Name Size VMA LMA File off Algn ALLOC 12 .ARM.attributes 00000030 00000000 00000000 00020018 2**0 CONTENTS, READONLY - 13 .debug_info 00006306 00000000 00000000 00020048 2**0 + 13 .debug_info 00004c71 00000000 00000000 00020048 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_abbrev 0000138a 00000000 00000000 0002634e 2**0 + 14 .debug_abbrev 0000115d 00000000 00000000 00024cb9 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_aranges 000004d0 00000000 00000000 000276d8 2**3 + 15 .debug_aranges 000004d0 00000000 00000000 00025e18 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_ranges 00000428 00000000 00000000 00027ba8 2**3 + 16 .debug_ranges 00000428 00000000 00000000 000262e8 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_macro 00024e04 00000000 00000000 00027fd0 2**0 + 17 .debug_macro 00024d15 00000000 00000000 00026710 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_line 00007156 00000000 00000000 0004cdd4 2**0 + 18 .debug_line 00006f32 00000000 00000000 0004b425 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .debug_str 000e14c3 00000000 00000000 00053f2a 2**0 + 19 .debug_str 000e10c2 00000000 00000000 00052357 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 20 .comment 00000053 00000000 00000000 001353ed 2**0 + 20 .comment 00000050 00000000 00000000 00133419 2**0 CONTENTS, READONLY - 21 .debug_frame 00001114 00000000 00000000 00135440 2**2 + 21 .debug_frame 00001118 00000000 00000000 0013346c 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -64,7 +64,7 @@ Disassembly of section .text: 80001c2: bd10 pop {r4, pc} 80001c4: 20000018 .word 0x20000018 80001c8: 00000000 .word 0x00000000 - 80001cc: 08001874 .word 0x08001874 + 80001cc: 080018c8 .word 0x080018c8 080001d0 : 80001d0: b508 push {r3, lr} @@ -76,7 +76,7 @@ Disassembly of section .text: 80001de: bd08 pop {r3, pc} 80001e0: 00000000 .word 0x00000000 80001e4: 2000001c .word 0x2000001c - 80001e8: 08001874 .word 0x08001874 + 80001e8: 080018c8 .word 0x080018c8 080001ec <__aeabi_uldivmod>: 80001ec: b953 cbnz r3, 8000204 <__aeabi_uldivmod+0x18> @@ -87,7 +87,7 @@ Disassembly of section .text: 80001f6: bf1c itt ne 80001f8: f04f 31ff movne.w r1, #4294967295 ; 0xffffffff 80001fc: f04f 30ff movne.w r0, #4294967295 ; 0xffffffff - 8000200: f000 b96e b.w 80004e0 <__aeabi_idiv0> + 8000200: f000 b974 b.w 80004ec <__aeabi_idiv0> 8000204: f1ad 0c08 sub.w ip, sp, #8 8000208: e96d ce04 strd ip, lr, [sp, #-16]! 800020c: f000 f806 bl 800021c <__udivmoddi4> @@ -100,3731 +100,3763 @@ Disassembly of section .text: 800021c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8000220: 9d08 ldr r5, [sp, #32] 8000222: 4604 mov r4, r0 - 8000224: 468c mov ip, r1 + 8000224: 468e mov lr, r1 8000226: 2b00 cmp r3, #0 - 8000228: f040 8083 bne.w 8000332 <__udivmoddi4+0x116> - 800022c: 428a cmp r2, r1 - 800022e: 4617 mov r7, r2 - 8000230: d947 bls.n 80002c2 <__udivmoddi4+0xa6> - 8000232: fab2 f282 clz r2, r2 - 8000236: b142 cbz r2, 800024a <__udivmoddi4+0x2e> - 8000238: f1c2 0020 rsb r0, r2, #32 - 800023c: fa24 f000 lsr.w r0, r4, r0 - 8000240: 4091 lsls r1, r2 - 8000242: 4097 lsls r7, r2 - 8000244: ea40 0c01 orr.w ip, r0, r1 - 8000248: 4094 lsls r4, r2 - 800024a: ea4f 4817 mov.w r8, r7, lsr #16 - 800024e: 0c23 lsrs r3, r4, #16 - 8000250: fbbc f6f8 udiv r6, ip, r8 - 8000254: fa1f fe87 uxth.w lr, r7 - 8000258: fb08 c116 mls r1, r8, r6, ip - 800025c: ea43 4301 orr.w r3, r3, r1, lsl #16 - 8000260: fb06 f10e mul.w r1, r6, lr - 8000264: 4299 cmp r1, r3 - 8000266: d909 bls.n 800027c <__udivmoddi4+0x60> - 8000268: 18fb adds r3, r7, r3 - 800026a: f106 30ff add.w r0, r6, #4294967295 ; 0xffffffff - 800026e: f080 8119 bcs.w 80004a4 <__udivmoddi4+0x288> - 8000272: 4299 cmp r1, r3 - 8000274: f240 8116 bls.w 80004a4 <__udivmoddi4+0x288> - 8000278: 3e02 subs r6, #2 - 800027a: 443b add r3, r7 - 800027c: 1a5b subs r3, r3, r1 - 800027e: b2a4 uxth r4, r4 - 8000280: fbb3 f0f8 udiv r0, r3, r8 - 8000284: fb08 3310 mls r3, r8, r0, r3 - 8000288: ea44 4403 orr.w r4, r4, r3, lsl #16 - 800028c: fb00 fe0e mul.w lr, r0, lr - 8000290: 45a6 cmp lr, r4 - 8000292: d909 bls.n 80002a8 <__udivmoddi4+0x8c> - 8000294: 193c adds r4, r7, r4 - 8000296: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff - 800029a: f080 8105 bcs.w 80004a8 <__udivmoddi4+0x28c> - 800029e: 45a6 cmp lr, r4 - 80002a0: f240 8102 bls.w 80004a8 <__udivmoddi4+0x28c> - 80002a4: 3802 subs r0, #2 - 80002a6: 443c add r4, r7 - 80002a8: ea40 4006 orr.w r0, r0, r6, lsl #16 - 80002ac: eba4 040e sub.w r4, r4, lr - 80002b0: 2600 movs r6, #0 - 80002b2: b11d cbz r5, 80002bc <__udivmoddi4+0xa0> - 80002b4: 40d4 lsrs r4, r2 - 80002b6: 2300 movs r3, #0 - 80002b8: e9c5 4300 strd r4, r3, [r5] - 80002bc: 4631 mov r1, r6 - 80002be: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 80002c2: b902 cbnz r2, 80002c6 <__udivmoddi4+0xaa> - 80002c4: deff udf #255 ; 0xff - 80002c6: fab2 f282 clz r2, r2 - 80002ca: 2a00 cmp r2, #0 - 80002cc: d150 bne.n 8000370 <__udivmoddi4+0x154> - 80002ce: 1bcb subs r3, r1, r7 - 80002d0: ea4f 4e17 mov.w lr, r7, lsr #16 - 80002d4: fa1f f887 uxth.w r8, r7 - 80002d8: 2601 movs r6, #1 - 80002da: fbb3 fcfe udiv ip, r3, lr - 80002de: 0c21 lsrs r1, r4, #16 - 80002e0: fb0e 331c mls r3, lr, ip, r3 - 80002e4: ea41 4103 orr.w r1, r1, r3, lsl #16 - 80002e8: fb08 f30c mul.w r3, r8, ip - 80002ec: 428b cmp r3, r1 - 80002ee: d907 bls.n 8000300 <__udivmoddi4+0xe4> - 80002f0: 1879 adds r1, r7, r1 - 80002f2: f10c 30ff add.w r0, ip, #4294967295 ; 0xffffffff - 80002f6: d202 bcs.n 80002fe <__udivmoddi4+0xe2> - 80002f8: 428b cmp r3, r1 - 80002fa: f200 80e9 bhi.w 80004d0 <__udivmoddi4+0x2b4> - 80002fe: 4684 mov ip, r0 - 8000300: 1ac9 subs r1, r1, r3 - 8000302: b2a3 uxth r3, r4 - 8000304: fbb1 f0fe udiv r0, r1, lr - 8000308: fb0e 1110 mls r1, lr, r0, r1 - 800030c: ea43 4401 orr.w r4, r3, r1, lsl #16 - 8000310: fb08 f800 mul.w r8, r8, r0 - 8000314: 45a0 cmp r8, r4 - 8000316: d907 bls.n 8000328 <__udivmoddi4+0x10c> - 8000318: 193c adds r4, r7, r4 - 800031a: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff - 800031e: d202 bcs.n 8000326 <__udivmoddi4+0x10a> - 8000320: 45a0 cmp r8, r4 - 8000322: f200 80d9 bhi.w 80004d8 <__udivmoddi4+0x2bc> - 8000326: 4618 mov r0, r3 - 8000328: eba4 0408 sub.w r4, r4, r8 - 800032c: ea40 400c orr.w r0, r0, ip, lsl #16 - 8000330: e7bf b.n 80002b2 <__udivmoddi4+0x96> - 8000332: 428b cmp r3, r1 - 8000334: d909 bls.n 800034a <__udivmoddi4+0x12e> - 8000336: 2d00 cmp r5, #0 - 8000338: f000 80b1 beq.w 800049e <__udivmoddi4+0x282> - 800033c: 2600 movs r6, #0 - 800033e: e9c5 0100 strd r0, r1, [r5] - 8000342: 4630 mov r0, r6 - 8000344: 4631 mov r1, r6 - 8000346: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 800034a: fab3 f683 clz r6, r3 - 800034e: 2e00 cmp r6, #0 - 8000350: d14a bne.n 80003e8 <__udivmoddi4+0x1cc> - 8000352: 428b cmp r3, r1 - 8000354: d302 bcc.n 800035c <__udivmoddi4+0x140> - 8000356: 4282 cmp r2, r0 - 8000358: f200 80b8 bhi.w 80004cc <__udivmoddi4+0x2b0> - 800035c: 1a84 subs r4, r0, r2 - 800035e: eb61 0103 sbc.w r1, r1, r3 - 8000362: 2001 movs r0, #1 - 8000364: 468c mov ip, r1 - 8000366: 2d00 cmp r5, #0 - 8000368: d0a8 beq.n 80002bc <__udivmoddi4+0xa0> - 800036a: e9c5 4c00 strd r4, ip, [r5] - 800036e: e7a5 b.n 80002bc <__udivmoddi4+0xa0> - 8000370: f1c2 0320 rsb r3, r2, #32 - 8000374: fa20 f603 lsr.w r6, r0, r3 - 8000378: 4097 lsls r7, r2 - 800037a: fa01 f002 lsl.w r0, r1, r2 - 800037e: ea4f 4e17 mov.w lr, r7, lsr #16 - 8000382: 40d9 lsrs r1, r3 - 8000384: 4330 orrs r0, r6 - 8000386: 0c03 lsrs r3, r0, #16 - 8000388: fbb1 f6fe udiv r6, r1, lr - 800038c: fa1f f887 uxth.w r8, r7 - 8000390: fb0e 1116 mls r1, lr, r6, r1 - 8000394: ea43 4301 orr.w r3, r3, r1, lsl #16 - 8000398: fb06 f108 mul.w r1, r6, r8 - 800039c: 4299 cmp r1, r3 - 800039e: fa04 f402 lsl.w r4, r4, r2 - 80003a2: d909 bls.n 80003b8 <__udivmoddi4+0x19c> - 80003a4: 18fb adds r3, r7, r3 - 80003a6: f106 3cff add.w ip, r6, #4294967295 ; 0xffffffff - 80003aa: f080 808d bcs.w 80004c8 <__udivmoddi4+0x2ac> - 80003ae: 4299 cmp r1, r3 - 80003b0: f240 808a bls.w 80004c8 <__udivmoddi4+0x2ac> - 80003b4: 3e02 subs r6, #2 - 80003b6: 443b add r3, r7 - 80003b8: 1a5b subs r3, r3, r1 - 80003ba: b281 uxth r1, r0 - 80003bc: fbb3 f0fe udiv r0, r3, lr - 80003c0: fb0e 3310 mls r3, lr, r0, r3 - 80003c4: ea41 4103 orr.w r1, r1, r3, lsl #16 - 80003c8: fb00 f308 mul.w r3, r0, r8 - 80003cc: 428b cmp r3, r1 - 80003ce: d907 bls.n 80003e0 <__udivmoddi4+0x1c4> - 80003d0: 1879 adds r1, r7, r1 - 80003d2: f100 3cff add.w ip, r0, #4294967295 ; 0xffffffff - 80003d6: d273 bcs.n 80004c0 <__udivmoddi4+0x2a4> - 80003d8: 428b cmp r3, r1 - 80003da: d971 bls.n 80004c0 <__udivmoddi4+0x2a4> - 80003dc: 3802 subs r0, #2 - 80003de: 4439 add r1, r7 - 80003e0: 1acb subs r3, r1, r3 - 80003e2: ea40 4606 orr.w r6, r0, r6, lsl #16 - 80003e6: e778 b.n 80002da <__udivmoddi4+0xbe> - 80003e8: f1c6 0c20 rsb ip, r6, #32 - 80003ec: fa03 f406 lsl.w r4, r3, r6 - 80003f0: fa22 f30c lsr.w r3, r2, ip - 80003f4: 431c orrs r4, r3 - 80003f6: fa20 f70c lsr.w r7, r0, ip - 80003fa: fa01 f306 lsl.w r3, r1, r6 - 80003fe: ea4f 4e14 mov.w lr, r4, lsr #16 - 8000402: fa21 f10c lsr.w r1, r1, ip - 8000406: 431f orrs r7, r3 - 8000408: 0c3b lsrs r3, r7, #16 - 800040a: fbb1 f9fe udiv r9, r1, lr - 800040e: fa1f f884 uxth.w r8, r4 - 8000412: fb0e 1119 mls r1, lr, r9, r1 - 8000416: ea43 4101 orr.w r1, r3, r1, lsl #16 - 800041a: fb09 fa08 mul.w sl, r9, r8 - 800041e: 458a cmp sl, r1 - 8000420: fa02 f206 lsl.w r2, r2, r6 - 8000424: fa00 f306 lsl.w r3, r0, r6 - 8000428: d908 bls.n 800043c <__udivmoddi4+0x220> - 800042a: 1861 adds r1, r4, r1 - 800042c: f109 30ff add.w r0, r9, #4294967295 ; 0xffffffff - 8000430: d248 bcs.n 80004c4 <__udivmoddi4+0x2a8> - 8000432: 458a cmp sl, r1 - 8000434: d946 bls.n 80004c4 <__udivmoddi4+0x2a8> - 8000436: f1a9 0902 sub.w r9, r9, #2 - 800043a: 4421 add r1, r4 - 800043c: eba1 010a sub.w r1, r1, sl - 8000440: b2bf uxth r7, r7 - 8000442: fbb1 f0fe udiv r0, r1, lr - 8000446: fb0e 1110 mls r1, lr, r0, r1 - 800044a: ea47 4701 orr.w r7, r7, r1, lsl #16 - 800044e: fb00 f808 mul.w r8, r0, r8 - 8000452: 45b8 cmp r8, r7 - 8000454: d907 bls.n 8000466 <__udivmoddi4+0x24a> - 8000456: 19e7 adds r7, r4, r7 - 8000458: f100 31ff add.w r1, r0, #4294967295 ; 0xffffffff - 800045c: d22e bcs.n 80004bc <__udivmoddi4+0x2a0> - 800045e: 45b8 cmp r8, r7 - 8000460: d92c bls.n 80004bc <__udivmoddi4+0x2a0> - 8000462: 3802 subs r0, #2 - 8000464: 4427 add r7, r4 - 8000466: ea40 4009 orr.w r0, r0, r9, lsl #16 - 800046a: eba7 0708 sub.w r7, r7, r8 - 800046e: fba0 8902 umull r8, r9, r0, r2 - 8000472: 454f cmp r7, r9 - 8000474: 46c6 mov lr, r8 - 8000476: 4649 mov r1, r9 - 8000478: d31a bcc.n 80004b0 <__udivmoddi4+0x294> - 800047a: d017 beq.n 80004ac <__udivmoddi4+0x290> - 800047c: b15d cbz r5, 8000496 <__udivmoddi4+0x27a> - 800047e: ebb3 020e subs.w r2, r3, lr - 8000482: eb67 0701 sbc.w r7, r7, r1 - 8000486: fa07 fc0c lsl.w ip, r7, ip - 800048a: 40f2 lsrs r2, r6 - 800048c: ea4c 0202 orr.w r2, ip, r2 - 8000490: 40f7 lsrs r7, r6 - 8000492: e9c5 2700 strd r2, r7, [r5] - 8000496: 2600 movs r6, #0 - 8000498: 4631 mov r1, r6 - 800049a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 800049e: 462e mov r6, r5 - 80004a0: 4628 mov r0, r5 - 80004a2: e70b b.n 80002bc <__udivmoddi4+0xa0> - 80004a4: 4606 mov r6, r0 - 80004a6: e6e9 b.n 800027c <__udivmoddi4+0x60> - 80004a8: 4618 mov r0, r3 - 80004aa: e6fd b.n 80002a8 <__udivmoddi4+0x8c> - 80004ac: 4543 cmp r3, r8 - 80004ae: d2e5 bcs.n 800047c <__udivmoddi4+0x260> - 80004b0: ebb8 0e02 subs.w lr, r8, r2 - 80004b4: eb69 0104 sbc.w r1, r9, r4 - 80004b8: 3801 subs r0, #1 - 80004ba: e7df b.n 800047c <__udivmoddi4+0x260> - 80004bc: 4608 mov r0, r1 - 80004be: e7d2 b.n 8000466 <__udivmoddi4+0x24a> - 80004c0: 4660 mov r0, ip - 80004c2: e78d b.n 80003e0 <__udivmoddi4+0x1c4> - 80004c4: 4681 mov r9, r0 - 80004c6: e7b9 b.n 800043c <__udivmoddi4+0x220> - 80004c8: 4666 mov r6, ip - 80004ca: e775 b.n 80003b8 <__udivmoddi4+0x19c> - 80004cc: 4630 mov r0, r6 - 80004ce: e74a b.n 8000366 <__udivmoddi4+0x14a> - 80004d0: f1ac 0c02 sub.w ip, ip, #2 - 80004d4: 4439 add r1, r7 - 80004d6: e713 b.n 8000300 <__udivmoddi4+0xe4> - 80004d8: 3802 subs r0, #2 - 80004da: 443c add r4, r7 - 80004dc: e724 b.n 8000328 <__udivmoddi4+0x10c> - 80004de: bf00 nop - -080004e0 <__aeabi_idiv0>: - 80004e0: 4770 bx lr - 80004e2: bf00 nop - -080004e4 : + 8000228: d14d bne.n 80002c6 <__udivmoddi4+0xaa> + 800022a: 428a cmp r2, r1 + 800022c: 4694 mov ip, r2 + 800022e: d969 bls.n 8000304 <__udivmoddi4+0xe8> + 8000230: fab2 f282 clz r2, r2 + 8000234: b152 cbz r2, 800024c <__udivmoddi4+0x30> + 8000236: fa01 f302 lsl.w r3, r1, r2 + 800023a: f1c2 0120 rsb r1, r2, #32 + 800023e: fa20 f101 lsr.w r1, r0, r1 + 8000242: fa0c fc02 lsl.w ip, ip, r2 + 8000246: ea41 0e03 orr.w lr, r1, r3 + 800024a: 4094 lsls r4, r2 + 800024c: ea4f 481c mov.w r8, ip, lsr #16 + 8000250: 0c21 lsrs r1, r4, #16 + 8000252: fbbe f6f8 udiv r6, lr, r8 + 8000256: fa1f f78c uxth.w r7, ip + 800025a: fb08 e316 mls r3, r8, r6, lr + 800025e: ea41 4303 orr.w r3, r1, r3, lsl #16 + 8000262: fb06 f107 mul.w r1, r6, r7 + 8000266: 4299 cmp r1, r3 + 8000268: d90a bls.n 8000280 <__udivmoddi4+0x64> + 800026a: eb1c 0303 adds.w r3, ip, r3 + 800026e: f106 30ff add.w r0, r6, #4294967295 ; 0xffffffff + 8000272: f080 811f bcs.w 80004b4 <__udivmoddi4+0x298> + 8000276: 4299 cmp r1, r3 + 8000278: f240 811c bls.w 80004b4 <__udivmoddi4+0x298> + 800027c: 3e02 subs r6, #2 + 800027e: 4463 add r3, ip + 8000280: 1a5b subs r3, r3, r1 + 8000282: b2a4 uxth r4, r4 + 8000284: fbb3 f0f8 udiv r0, r3, r8 + 8000288: fb08 3310 mls r3, r8, r0, r3 + 800028c: ea44 4403 orr.w r4, r4, r3, lsl #16 + 8000290: fb00 f707 mul.w r7, r0, r7 + 8000294: 42a7 cmp r7, r4 + 8000296: d90a bls.n 80002ae <__udivmoddi4+0x92> + 8000298: eb1c 0404 adds.w r4, ip, r4 + 800029c: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff + 80002a0: f080 810a bcs.w 80004b8 <__udivmoddi4+0x29c> + 80002a4: 42a7 cmp r7, r4 + 80002a6: f240 8107 bls.w 80004b8 <__udivmoddi4+0x29c> + 80002aa: 4464 add r4, ip + 80002ac: 3802 subs r0, #2 + 80002ae: ea40 4006 orr.w r0, r0, r6, lsl #16 + 80002b2: 1be4 subs r4, r4, r7 + 80002b4: 2600 movs r6, #0 + 80002b6: b11d cbz r5, 80002c0 <__udivmoddi4+0xa4> + 80002b8: 40d4 lsrs r4, r2 + 80002ba: 2300 movs r3, #0 + 80002bc: e9c5 4300 strd r4, r3, [r5] + 80002c0: 4631 mov r1, r6 + 80002c2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 80002c6: 428b cmp r3, r1 + 80002c8: d909 bls.n 80002de <__udivmoddi4+0xc2> + 80002ca: 2d00 cmp r5, #0 + 80002cc: f000 80ef beq.w 80004ae <__udivmoddi4+0x292> + 80002d0: 2600 movs r6, #0 + 80002d2: e9c5 0100 strd r0, r1, [r5] + 80002d6: 4630 mov r0, r6 + 80002d8: 4631 mov r1, r6 + 80002da: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 80002de: fab3 f683 clz r6, r3 + 80002e2: 2e00 cmp r6, #0 + 80002e4: d14a bne.n 800037c <__udivmoddi4+0x160> + 80002e6: 428b cmp r3, r1 + 80002e8: d302 bcc.n 80002f0 <__udivmoddi4+0xd4> + 80002ea: 4282 cmp r2, r0 + 80002ec: f200 80f9 bhi.w 80004e2 <__udivmoddi4+0x2c6> + 80002f0: 1a84 subs r4, r0, r2 + 80002f2: eb61 0303 sbc.w r3, r1, r3 + 80002f6: 2001 movs r0, #1 + 80002f8: 469e mov lr, r3 + 80002fa: 2d00 cmp r5, #0 + 80002fc: d0e0 beq.n 80002c0 <__udivmoddi4+0xa4> + 80002fe: e9c5 4e00 strd r4, lr, [r5] + 8000302: e7dd b.n 80002c0 <__udivmoddi4+0xa4> + 8000304: b902 cbnz r2, 8000308 <__udivmoddi4+0xec> + 8000306: deff udf #255 ; 0xff + 8000308: fab2 f282 clz r2, r2 + 800030c: 2a00 cmp r2, #0 + 800030e: f040 8092 bne.w 8000436 <__udivmoddi4+0x21a> + 8000312: eba1 010c sub.w r1, r1, ip + 8000316: ea4f 471c mov.w r7, ip, lsr #16 + 800031a: fa1f fe8c uxth.w lr, ip + 800031e: 2601 movs r6, #1 + 8000320: 0c20 lsrs r0, r4, #16 + 8000322: fbb1 f3f7 udiv r3, r1, r7 + 8000326: fb07 1113 mls r1, r7, r3, r1 + 800032a: ea40 4101 orr.w r1, r0, r1, lsl #16 + 800032e: fb0e f003 mul.w r0, lr, r3 + 8000332: 4288 cmp r0, r1 + 8000334: d908 bls.n 8000348 <__udivmoddi4+0x12c> + 8000336: eb1c 0101 adds.w r1, ip, r1 + 800033a: f103 38ff add.w r8, r3, #4294967295 ; 0xffffffff + 800033e: d202 bcs.n 8000346 <__udivmoddi4+0x12a> + 8000340: 4288 cmp r0, r1 + 8000342: f200 80cb bhi.w 80004dc <__udivmoddi4+0x2c0> + 8000346: 4643 mov r3, r8 + 8000348: 1a09 subs r1, r1, r0 + 800034a: b2a4 uxth r4, r4 + 800034c: fbb1 f0f7 udiv r0, r1, r7 + 8000350: fb07 1110 mls r1, r7, r0, r1 + 8000354: ea44 4401 orr.w r4, r4, r1, lsl #16 + 8000358: fb0e fe00 mul.w lr, lr, r0 + 800035c: 45a6 cmp lr, r4 + 800035e: d908 bls.n 8000372 <__udivmoddi4+0x156> + 8000360: eb1c 0404 adds.w r4, ip, r4 + 8000364: f100 31ff add.w r1, r0, #4294967295 ; 0xffffffff + 8000368: d202 bcs.n 8000370 <__udivmoddi4+0x154> + 800036a: 45a6 cmp lr, r4 + 800036c: f200 80bb bhi.w 80004e6 <__udivmoddi4+0x2ca> + 8000370: 4608 mov r0, r1 + 8000372: eba4 040e sub.w r4, r4, lr + 8000376: ea40 4003 orr.w r0, r0, r3, lsl #16 + 800037a: e79c b.n 80002b6 <__udivmoddi4+0x9a> + 800037c: f1c6 0720 rsb r7, r6, #32 + 8000380: 40b3 lsls r3, r6 + 8000382: fa22 fc07 lsr.w ip, r2, r7 + 8000386: ea4c 0c03 orr.w ip, ip, r3 + 800038a: fa20 f407 lsr.w r4, r0, r7 + 800038e: fa01 f306 lsl.w r3, r1, r6 + 8000392: 431c orrs r4, r3 + 8000394: 40f9 lsrs r1, r7 + 8000396: ea4f 491c mov.w r9, ip, lsr #16 + 800039a: fa00 f306 lsl.w r3, r0, r6 + 800039e: fbb1 f8f9 udiv r8, r1, r9 + 80003a2: 0c20 lsrs r0, r4, #16 + 80003a4: fa1f fe8c uxth.w lr, ip + 80003a8: fb09 1118 mls r1, r9, r8, r1 + 80003ac: ea40 4101 orr.w r1, r0, r1, lsl #16 + 80003b0: fb08 f00e mul.w r0, r8, lr + 80003b4: 4288 cmp r0, r1 + 80003b6: fa02 f206 lsl.w r2, r2, r6 + 80003ba: d90b bls.n 80003d4 <__udivmoddi4+0x1b8> + 80003bc: eb1c 0101 adds.w r1, ip, r1 + 80003c0: f108 3aff add.w sl, r8, #4294967295 ; 0xffffffff + 80003c4: f080 8088 bcs.w 80004d8 <__udivmoddi4+0x2bc> + 80003c8: 4288 cmp r0, r1 + 80003ca: f240 8085 bls.w 80004d8 <__udivmoddi4+0x2bc> + 80003ce: f1a8 0802 sub.w r8, r8, #2 + 80003d2: 4461 add r1, ip + 80003d4: 1a09 subs r1, r1, r0 + 80003d6: b2a4 uxth r4, r4 + 80003d8: fbb1 f0f9 udiv r0, r1, r9 + 80003dc: fb09 1110 mls r1, r9, r0, r1 + 80003e0: ea44 4101 orr.w r1, r4, r1, lsl #16 + 80003e4: fb00 fe0e mul.w lr, r0, lr + 80003e8: 458e cmp lr, r1 + 80003ea: d908 bls.n 80003fe <__udivmoddi4+0x1e2> + 80003ec: eb1c 0101 adds.w r1, ip, r1 + 80003f0: f100 34ff add.w r4, r0, #4294967295 ; 0xffffffff + 80003f4: d26c bcs.n 80004d0 <__udivmoddi4+0x2b4> + 80003f6: 458e cmp lr, r1 + 80003f8: d96a bls.n 80004d0 <__udivmoddi4+0x2b4> + 80003fa: 3802 subs r0, #2 + 80003fc: 4461 add r1, ip + 80003fe: ea40 4008 orr.w r0, r0, r8, lsl #16 + 8000402: fba0 9402 umull r9, r4, r0, r2 + 8000406: eba1 010e sub.w r1, r1, lr + 800040a: 42a1 cmp r1, r4 + 800040c: 46c8 mov r8, r9 + 800040e: 46a6 mov lr, r4 + 8000410: d356 bcc.n 80004c0 <__udivmoddi4+0x2a4> + 8000412: d053 beq.n 80004bc <__udivmoddi4+0x2a0> + 8000414: b15d cbz r5, 800042e <__udivmoddi4+0x212> + 8000416: ebb3 0208 subs.w r2, r3, r8 + 800041a: eb61 010e sbc.w r1, r1, lr + 800041e: fa01 f707 lsl.w r7, r1, r7 + 8000422: fa22 f306 lsr.w r3, r2, r6 + 8000426: 40f1 lsrs r1, r6 + 8000428: 431f orrs r7, r3 + 800042a: e9c5 7100 strd r7, r1, [r5] + 800042e: 2600 movs r6, #0 + 8000430: 4631 mov r1, r6 + 8000432: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8000436: f1c2 0320 rsb r3, r2, #32 + 800043a: 40d8 lsrs r0, r3 + 800043c: fa0c fc02 lsl.w ip, ip, r2 + 8000440: fa21 f303 lsr.w r3, r1, r3 + 8000444: 4091 lsls r1, r2 + 8000446: 4301 orrs r1, r0 + 8000448: ea4f 471c mov.w r7, ip, lsr #16 + 800044c: fa1f fe8c uxth.w lr, ip + 8000450: fbb3 f0f7 udiv r0, r3, r7 + 8000454: fb07 3610 mls r6, r7, r0, r3 + 8000458: 0c0b lsrs r3, r1, #16 + 800045a: ea43 4306 orr.w r3, r3, r6, lsl #16 + 800045e: fb00 f60e mul.w r6, r0, lr + 8000462: 429e cmp r6, r3 + 8000464: fa04 f402 lsl.w r4, r4, r2 + 8000468: d908 bls.n 800047c <__udivmoddi4+0x260> + 800046a: eb1c 0303 adds.w r3, ip, r3 + 800046e: f100 38ff add.w r8, r0, #4294967295 ; 0xffffffff + 8000472: d22f bcs.n 80004d4 <__udivmoddi4+0x2b8> + 8000474: 429e cmp r6, r3 + 8000476: d92d bls.n 80004d4 <__udivmoddi4+0x2b8> + 8000478: 3802 subs r0, #2 + 800047a: 4463 add r3, ip + 800047c: 1b9b subs r3, r3, r6 + 800047e: b289 uxth r1, r1 + 8000480: fbb3 f6f7 udiv r6, r3, r7 + 8000484: fb07 3316 mls r3, r7, r6, r3 + 8000488: ea41 4103 orr.w r1, r1, r3, lsl #16 + 800048c: fb06 f30e mul.w r3, r6, lr + 8000490: 428b cmp r3, r1 + 8000492: d908 bls.n 80004a6 <__udivmoddi4+0x28a> + 8000494: eb1c 0101 adds.w r1, ip, r1 + 8000498: f106 38ff add.w r8, r6, #4294967295 ; 0xffffffff + 800049c: d216 bcs.n 80004cc <__udivmoddi4+0x2b0> + 800049e: 428b cmp r3, r1 + 80004a0: d914 bls.n 80004cc <__udivmoddi4+0x2b0> + 80004a2: 3e02 subs r6, #2 + 80004a4: 4461 add r1, ip + 80004a6: 1ac9 subs r1, r1, r3 + 80004a8: ea46 4600 orr.w r6, r6, r0, lsl #16 + 80004ac: e738 b.n 8000320 <__udivmoddi4+0x104> + 80004ae: 462e mov r6, r5 + 80004b0: 4628 mov r0, r5 + 80004b2: e705 b.n 80002c0 <__udivmoddi4+0xa4> + 80004b4: 4606 mov r6, r0 + 80004b6: e6e3 b.n 8000280 <__udivmoddi4+0x64> + 80004b8: 4618 mov r0, r3 + 80004ba: e6f8 b.n 80002ae <__udivmoddi4+0x92> + 80004bc: 454b cmp r3, r9 + 80004be: d2a9 bcs.n 8000414 <__udivmoddi4+0x1f8> + 80004c0: ebb9 0802 subs.w r8, r9, r2 + 80004c4: eb64 0e0c sbc.w lr, r4, ip + 80004c8: 3801 subs r0, #1 + 80004ca: e7a3 b.n 8000414 <__udivmoddi4+0x1f8> + 80004cc: 4646 mov r6, r8 + 80004ce: e7ea b.n 80004a6 <__udivmoddi4+0x28a> + 80004d0: 4620 mov r0, r4 + 80004d2: e794 b.n 80003fe <__udivmoddi4+0x1e2> + 80004d4: 4640 mov r0, r8 + 80004d6: e7d1 b.n 800047c <__udivmoddi4+0x260> + 80004d8: 46d0 mov r8, sl + 80004da: e77b b.n 80003d4 <__udivmoddi4+0x1b8> + 80004dc: 3b02 subs r3, #2 + 80004de: 4461 add r1, ip + 80004e0: e732 b.n 8000348 <__udivmoddi4+0x12c> + 80004e2: 4630 mov r0, r6 + 80004e4: e709 b.n 80002fa <__udivmoddi4+0xde> + 80004e6: 4464 add r4, ip + 80004e8: 3802 subs r0, #2 + 80004ea: e742 b.n 8000372 <__udivmoddi4+0x156> + +080004ec <__aeabi_idiv0>: + 80004ec: 4770 bx lr + 80004ee: bf00 nop + +080004f0 : * @arg LED1 * @arg LED2 * @arg LED3 */ void BSP_LED_Init(Led_TypeDef Led) { - 80004e4: b580 push {r7, lr} - 80004e6: b08a sub sp, #40 ; 0x28 - 80004e8: af00 add r7, sp, #0 - 80004ea: 4603 mov r3, r0 - 80004ec: 71fb strb r3, [r7, #7] + 80004f0: b580 push {r7, lr} + 80004f2: b08a sub sp, #40 ; 0x28 + 80004f4: af00 add r7, sp, #0 + 80004f6: 4603 mov r3, r0 + 80004f8: 71fb strb r3, [r7, #7] GPIO_InitTypeDef GPIO_InitStruct; /* Enable the GPIO_LED Clock */ LEDx_GPIO_CLK_ENABLE(Led); - 80004ee: 79fb ldrb r3, [r7, #7] - 80004f0: 2b00 cmp r3, #0 - 80004f2: d10e bne.n 8000512 - 80004f4: 2300 movs r3, #0 - 80004f6: 613b str r3, [r7, #16] - 80004f8: 4b1f ldr r3, [pc, #124] ; (8000578 ) - 80004fa: 6b1b ldr r3, [r3, #48] ; 0x30 - 80004fc: 4a1e ldr r2, [pc, #120] ; (8000578 ) - 80004fe: f043 0302 orr.w r3, r3, #2 - 8000502: 6313 str r3, [r2, #48] ; 0x30 - 8000504: 4b1c ldr r3, [pc, #112] ; (8000578 ) + 80004fa: 79fb ldrb r3, [r7, #7] + 80004fc: 2b00 cmp r3, #0 + 80004fe: d10e bne.n 800051e + 8000500: 2300 movs r3, #0 + 8000502: 613b str r3, [r7, #16] + 8000504: 4b1f ldr r3, [pc, #124] ; (8000584 ) 8000506: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000508: f003 0302 and.w r3, r3, #2 - 800050c: 613b str r3, [r7, #16] - 800050e: 693b ldr r3, [r7, #16] - 8000510: e00d b.n 800052e - 8000512: 2300 movs r3, #0 - 8000514: 60fb str r3, [r7, #12] - 8000516: 4b18 ldr r3, [pc, #96] ; (8000578 ) - 8000518: 6b1b ldr r3, [r3, #48] ; 0x30 - 800051a: 4a17 ldr r2, [pc, #92] ; (8000578 ) - 800051c: f043 0302 orr.w r3, r3, #2 - 8000520: 6313 str r3, [r2, #48] ; 0x30 - 8000522: 4b15 ldr r3, [pc, #84] ; (8000578 ) + 8000508: 4a1e ldr r2, [pc, #120] ; (8000584 ) + 800050a: f043 0302 orr.w r3, r3, #2 + 800050e: 6313 str r3, [r2, #48] ; 0x30 + 8000510: 4b1c ldr r3, [pc, #112] ; (8000584 ) + 8000512: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000514: f003 0302 and.w r3, r3, #2 + 8000518: 613b str r3, [r7, #16] + 800051a: 693b ldr r3, [r7, #16] + 800051c: e00d b.n 800053a + 800051e: 2300 movs r3, #0 + 8000520: 60fb str r3, [r7, #12] + 8000522: 4b18 ldr r3, [pc, #96] ; (8000584 ) 8000524: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000526: f003 0302 and.w r3, r3, #2 - 800052a: 60fb str r3, [r7, #12] - 800052c: 68fb ldr r3, [r7, #12] + 8000526: 4a17 ldr r2, [pc, #92] ; (8000584 ) + 8000528: f043 0302 orr.w r3, r3, #2 + 800052c: 6313 str r3, [r2, #48] ; 0x30 + 800052e: 4b15 ldr r3, [pc, #84] ; (8000584 ) + 8000530: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000532: f003 0302 and.w r3, r3, #2 + 8000536: 60fb str r3, [r7, #12] + 8000538: 68fb ldr r3, [r7, #12] /* Configure the GPIO_LED pin */ GPIO_InitStruct.Pin = GPIO_PIN[Led]; - 800052e: 79fb ldrb r3, [r7, #7] - 8000530: 4a12 ldr r2, [pc, #72] ; (800057c ) - 8000532: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000536: 617b str r3, [r7, #20] + 800053a: 79fb ldrb r3, [r7, #7] + 800053c: 4a12 ldr r2, [pc, #72] ; (8000588 ) + 800053e: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8000542: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8000538: 2301 movs r3, #1 - 800053a: 61bb str r3, [r7, #24] + 8000544: 2301 movs r3, #1 + 8000546: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800053c: 2300 movs r3, #0 - 800053e: 61fb str r3, [r7, #28] + 8000548: 2300 movs r3, #0 + 800054a: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FAST; - 8000540: 2302 movs r3, #2 - 8000542: 623b str r3, [r7, #32] + 800054c: 2302 movs r3, #2 + 800054e: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIO_PORT[Led], &GPIO_InitStruct); - 8000544: 79fb ldrb r3, [r7, #7] - 8000546: 4a0e ldr r2, [pc, #56] ; (8000580 ) - 8000548: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 800054c: f107 0214 add.w r2, r7, #20 - 8000550: 4611 mov r1, r2 - 8000552: 4618 mov r0, r3 - 8000554: f000 fa24 bl 80009a0 + 8000550: 79fb ldrb r3, [r7, #7] + 8000552: 4a0e ldr r2, [pc, #56] ; (800058c ) + 8000554: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8000558: f107 0214 add.w r2, r7, #20 + 800055c: 4611 mov r1, r2 + 800055e: 4618 mov r0, r3 + 8000560: f000 fa24 bl 80009ac HAL_GPIO_WritePin(GPIO_PORT[Led], GPIO_PIN[Led], GPIO_PIN_RESET); - 8000558: 79fb ldrb r3, [r7, #7] - 800055a: 4a09 ldr r2, [pc, #36] ; (8000580 ) - 800055c: f852 0023 ldr.w r0, [r2, r3, lsl #2] - 8000560: 79fb ldrb r3, [r7, #7] - 8000562: 4a06 ldr r2, [pc, #24] ; (800057c ) - 8000564: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000568: 2200 movs r2, #0 - 800056a: 4619 mov r1, r3 - 800056c: f000 fbc4 bl 8000cf8 + 8000564: 79fb ldrb r3, [r7, #7] + 8000566: 4a09 ldr r2, [pc, #36] ; (800058c ) + 8000568: f852 0023 ldr.w r0, [r2, r3, lsl #2] + 800056c: 79fb ldrb r3, [r7, #7] + 800056e: 4a06 ldr r2, [pc, #24] ; (8000588 ) + 8000570: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8000574: 2200 movs r2, #0 + 8000576: 4619 mov r1, r3 + 8000578: f000 fbc4 bl 8000d04 } - 8000570: bf00 nop - 8000572: 3728 adds r7, #40 ; 0x28 - 8000574: 46bd mov sp, r7 - 8000576: bd80 pop {r7, pc} - 8000578: 40023800 .word 0x40023800 - 800057c: 0800188c .word 0x0800188c - 8000580: 20000000 .word 0x20000000 - -08000584 : + 800057c: bf00 nop + 800057e: 3728 adds r7, #40 ; 0x28 + 8000580: 46bd mov sp, r7 + 8000582: bd80 pop {r7, pc} + 8000584: 40023800 .word 0x40023800 + 8000588: 080018e0 .word 0x080018e0 + 800058c: 20000000 .word 0x20000000 + +08000590 : * @param Led: Specifies the Led to be set on. * This parameter can be one of following parameters: * @arg LED2 */ void BSP_LED_On(Led_TypeDef Led) { - 8000584: b580 push {r7, lr} - 8000586: b082 sub sp, #8 - 8000588: af00 add r7, sp, #0 - 800058a: 4603 mov r3, r0 - 800058c: 71fb strb r3, [r7, #7] + 8000590: b580 push {r7, lr} + 8000592: b082 sub sp, #8 + 8000594: af00 add r7, sp, #0 + 8000596: 4603 mov r3, r0 + 8000598: 71fb strb r3, [r7, #7] HAL_GPIO_WritePin(GPIO_PORT[Led], GPIO_PIN[Led], GPIO_PIN_SET); - 800058e: 79fb ldrb r3, [r7, #7] - 8000590: 4a07 ldr r2, [pc, #28] ; (80005b0 ) - 8000592: f852 0023 ldr.w r0, [r2, r3, lsl #2] - 8000596: 79fb ldrb r3, [r7, #7] - 8000598: 4a06 ldr r2, [pc, #24] ; (80005b4 ) - 800059a: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 800059e: 2201 movs r2, #1 - 80005a0: 4619 mov r1, r3 - 80005a2: f000 fba9 bl 8000cf8 + 800059a: 79fb ldrb r3, [r7, #7] + 800059c: 4a07 ldr r2, [pc, #28] ; (80005bc ) + 800059e: f852 0023 ldr.w r0, [r2, r3, lsl #2] + 80005a2: 79fb ldrb r3, [r7, #7] + 80005a4: 4a06 ldr r2, [pc, #24] ; (80005c0 ) + 80005a6: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 80005aa: 2201 movs r2, #1 + 80005ac: 4619 mov r1, r3 + 80005ae: f000 fba9 bl 8000d04 } - 80005a6: bf00 nop - 80005a8: 3708 adds r7, #8 - 80005aa: 46bd mov sp, r7 - 80005ac: bd80 pop {r7, pc} - 80005ae: bf00 nop - 80005b0: 20000000 .word 0x20000000 - 80005b4: 0800188c .word 0x0800188c - -080005b8 : + 80005b2: bf00 nop + 80005b4: 3708 adds r7, #8 + 80005b6: 46bd mov sp, r7 + 80005b8: bd80 pop {r7, pc} + 80005ba: bf00 nop + 80005bc: 20000000 .word 0x20000000 + 80005c0: 080018e0 .word 0x080018e0 + +080005c4 : * @arg LED1 * @arg LED2 * @arg LED3 */ void BSP_LED_Toggle(Led_TypeDef Led) { - 80005b8: b580 push {r7, lr} - 80005ba: b082 sub sp, #8 - 80005bc: af00 add r7, sp, #0 - 80005be: 4603 mov r3, r0 - 80005c0: 71fb strb r3, [r7, #7] + 80005c4: b580 push {r7, lr} + 80005c6: b082 sub sp, #8 + 80005c8: af00 add r7, sp, #0 + 80005ca: 4603 mov r3, r0 + 80005cc: 71fb strb r3, [r7, #7] HAL_GPIO_TogglePin(GPIO_PORT[Led], GPIO_PIN[Led]); - 80005c2: 79fb ldrb r3, [r7, #7] - 80005c4: 4a07 ldr r2, [pc, #28] ; (80005e4 ) - 80005c6: f852 2023 ldr.w r2, [r2, r3, lsl #2] - 80005ca: 79fb ldrb r3, [r7, #7] - 80005cc: 4906 ldr r1, [pc, #24] ; (80005e8 ) - 80005ce: f831 3013 ldrh.w r3, [r1, r3, lsl #1] - 80005d2: 4619 mov r1, r3 - 80005d4: 4610 mov r0, r2 - 80005d6: f000 fba8 bl 8000d2a + 80005ce: 79fb ldrb r3, [r7, #7] + 80005d0: 4a07 ldr r2, [pc, #28] ; (80005f0 ) + 80005d2: f852 2023 ldr.w r2, [r2, r3, lsl #2] + 80005d6: 79fb ldrb r3, [r7, #7] + 80005d8: 4906 ldr r1, [pc, #24] ; (80005f4 ) + 80005da: f831 3013 ldrh.w r3, [r1, r3, lsl #1] + 80005de: 4619 mov r1, r3 + 80005e0: 4610 mov r0, r2 + 80005e2: f000 fba8 bl 8000d36 } - 80005da: bf00 nop - 80005dc: 3708 adds r7, #8 - 80005de: 46bd mov sp, r7 - 80005e0: bd80 pop {r7, pc} - 80005e2: bf00 nop - 80005e4: 20000000 .word 0x20000000 - 80005e8: 0800188c .word 0x0800188c - -080005ec : + 80005e6: bf00 nop + 80005e8: 3708 adds r7, #8 + 80005ea: 46bd mov sp, r7 + 80005ec: bd80 pop {r7, pc} + 80005ee: bf00 nop + 80005f0: 20000000 .word 0x20000000 + 80005f4: 080018e0 .word 0x080018e0 + +080005f8 : * configuration. * @param None * @retval None */ void SystemInit(void) { - 80005ec: b480 push {r7} - 80005ee: af00 add r7, sp, #0 + 80005f8: b480 push {r7} + 80005fa: af00 add r7, sp, #0 /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - 80005f0: 4b16 ldr r3, [pc, #88] ; (800064c ) - 80005f2: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 80005f6: 4a15 ldr r2, [pc, #84] ; (800064c ) - 80005f8: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 - 80005fc: f8c2 3088 str.w r3, [r2, #136] ; 0x88 + 80005fc: 4b16 ldr r3, [pc, #88] ; (8000658 ) + 80005fe: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8000602: 4a15 ldr r2, [pc, #84] ; (8000658 ) + 8000604: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 + 8000608: f8c2 3088 str.w r3, [r2, #136] ; 0x88 #endif /* Reset the RCC clock configuration to the default reset state ------------*/ /* Set HSION bit */ RCC->CR |= (uint32_t)0x00000001; - 8000600: 4b13 ldr r3, [pc, #76] ; (8000650 ) - 8000602: 681b ldr r3, [r3, #0] - 8000604: 4a12 ldr r2, [pc, #72] ; (8000650 ) - 8000606: f043 0301 orr.w r3, r3, #1 - 800060a: 6013 str r3, [r2, #0] + 800060c: 4b13 ldr r3, [pc, #76] ; (800065c ) + 800060e: 681b ldr r3, [r3, #0] + 8000610: 4a12 ldr r2, [pc, #72] ; (800065c ) + 8000612: f043 0301 orr.w r3, r3, #1 + 8000616: 6013 str r3, [r2, #0] /* Reset CFGR register */ RCC->CFGR = 0x00000000; - 800060c: 4b10 ldr r3, [pc, #64] ; (8000650 ) - 800060e: 2200 movs r2, #0 - 8000610: 609a str r2, [r3, #8] + 8000618: 4b10 ldr r3, [pc, #64] ; (800065c ) + 800061a: 2200 movs r2, #0 + 800061c: 609a str r2, [r3, #8] /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= (uint32_t)0xFEF6FFFF; - 8000612: 4b0f ldr r3, [pc, #60] ; (8000650 ) - 8000614: 681b ldr r3, [r3, #0] - 8000616: 4a0e ldr r2, [pc, #56] ; (8000650 ) - 8000618: f023 7384 bic.w r3, r3, #17301504 ; 0x1080000 - 800061c: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8000620: 6013 str r3, [r2, #0] + 800061e: 4b0f ldr r3, [pc, #60] ; (800065c ) + 8000620: 681b ldr r3, [r3, #0] + 8000622: 4a0e ldr r2, [pc, #56] ; (800065c ) + 8000624: f023 7384 bic.w r3, r3, #17301504 ; 0x1080000 + 8000628: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 800062c: 6013 str r3, [r2, #0] /* Reset PLLCFGR register */ RCC->PLLCFGR = 0x24003010; - 8000622: 4b0b ldr r3, [pc, #44] ; (8000650 ) - 8000624: 4a0b ldr r2, [pc, #44] ; (8000654 ) - 8000626: 605a str r2, [r3, #4] + 800062e: 4b0b ldr r3, [pc, #44] ; (800065c ) + 8000630: 4a0b ldr r2, [pc, #44] ; (8000660 ) + 8000632: 605a str r2, [r3, #4] /* Reset HSEBYP bit */ RCC->CR &= (uint32_t)0xFFFBFFFF; - 8000628: 4b09 ldr r3, [pc, #36] ; (8000650 ) - 800062a: 681b ldr r3, [r3, #0] - 800062c: 4a08 ldr r2, [pc, #32] ; (8000650 ) - 800062e: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 8000632: 6013 str r3, [r2, #0] + 8000634: 4b09 ldr r3, [pc, #36] ; (800065c ) + 8000636: 681b ldr r3, [r3, #0] + 8000638: 4a08 ldr r2, [pc, #32] ; (800065c ) + 800063a: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 800063e: 6013 str r3, [r2, #0] /* Disable all interrupts */ RCC->CIR = 0x00000000; - 8000634: 4b06 ldr r3, [pc, #24] ; (8000650 ) - 8000636: 2200 movs r2, #0 - 8000638: 60da str r2, [r3, #12] + 8000640: 4b06 ldr r3, [pc, #24] ; (800065c ) + 8000642: 2200 movs r2, #0 + 8000644: 60da str r2, [r3, #12] /* Configure the Vector Table location add offset address ------------------*/ #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ - 800063a: 4b04 ldr r3, [pc, #16] ; (800064c ) - 800063c: f04f 6200 mov.w r2, #134217728 ; 0x8000000 - 8000640: 609a str r2, [r3, #8] + 8000646: 4b04 ldr r3, [pc, #16] ; (8000658 ) + 8000648: f04f 6200 mov.w r2, #134217728 ; 0x8000000 + 800064c: 609a str r2, [r3, #8] #endif } - 8000642: bf00 nop - 8000644: 46bd mov sp, r7 - 8000646: f85d 7b04 ldr.w r7, [sp], #4 - 800064a: 4770 bx lr - 800064c: e000ed00 .word 0xe000ed00 - 8000650: 40023800 .word 0x40023800 - 8000654: 24003010 .word 0x24003010 - -08000658 : + 800064e: bf00 nop + 8000650: 46bd mov sp, r7 + 8000652: f85d 7b04 ldr.w r7, [sp], #4 + 8000656: 4770 bx lr + 8000658: e000ed00 .word 0xe000ed00 + 800065c: 40023800 .word 0x40023800 + 8000660: 24003010 .word 0x24003010 + +08000664 : * @brief This function handles NMI exception. * @param None * @retval None */ void NMI_Handler(void) { - 8000658: b480 push {r7} - 800065a: af00 add r7, sp, #0 + 8000664: b480 push {r7} + 8000666: af00 add r7, sp, #0 } - 800065c: bf00 nop - 800065e: 46bd mov sp, r7 - 8000660: f85d 7b04 ldr.w r7, [sp], #4 - 8000664: 4770 bx lr + 8000668: bf00 nop + 800066a: 46bd mov sp, r7 + 800066c: f85d 7b04 ldr.w r7, [sp], #4 + 8000670: 4770 bx lr -08000666 : +08000672 : * @brief This function handles Hard Fault exception. * @param None * @retval None */ void HardFault_Handler(void) { - 8000666: b480 push {r7} - 8000668: af00 add r7, sp, #0 + 8000672: b480 push {r7} + 8000674: af00 add r7, sp, #0 /* Go to infinite loop when Hard Fault exception occurs */ while (1) - 800066a: e7fe b.n 800066a + 8000676: e7fe b.n 8000676 -0800066c : +08000678 : * @brief This function handles Memory Manage exception. * @param None * @retval None */ void MemManage_Handler(void) { - 800066c: b480 push {r7} - 800066e: af00 add r7, sp, #0 + 8000678: b480 push {r7} + 800067a: af00 add r7, sp, #0 /* Go to infinite loop when Memory Manage exception occurs */ while (1) - 8000670: e7fe b.n 8000670 + 800067c: e7fe b.n 800067c -08000672 : +0800067e : * @brief This function handles Bus Fault exception. * @param None * @retval None */ void BusFault_Handler(void) { - 8000672: b480 push {r7} - 8000674: af00 add r7, sp, #0 + 800067e: b480 push {r7} + 8000680: af00 add r7, sp, #0 /* Go to infinite loop when Bus Fault exception occurs */ while (1) - 8000676: e7fe b.n 8000676 + 8000682: e7fe b.n 8000682 -08000678 : +08000684 : * @brief This function handles Usage Fault exception. * @param None * @retval None */ void UsageFault_Handler(void) { - 8000678: b480 push {r7} - 800067a: af00 add r7, sp, #0 + 8000684: b480 push {r7} + 8000686: af00 add r7, sp, #0 /* Go to infinite loop when Usage Fault exception occurs */ while (1) - 800067c: e7fe b.n 800067c + 8000688: e7fe b.n 8000688 -0800067e : +0800068a : * @brief This function handles SVCall exception. * @param None * @retval None */ void SVC_Handler(void) { - 800067e: b480 push {r7} - 8000680: af00 add r7, sp, #0 + 800068a: b480 push {r7} + 800068c: af00 add r7, sp, #0 } - 8000682: bf00 nop - 8000684: 46bd mov sp, r7 - 8000686: f85d 7b04 ldr.w r7, [sp], #4 - 800068a: 4770 bx lr + 800068e: bf00 nop + 8000690: 46bd mov sp, r7 + 8000692: f85d 7b04 ldr.w r7, [sp], #4 + 8000696: 4770 bx lr -0800068c : +08000698 : * @brief This function handles Debug Monitor exception. * @param None * @retval None */ void DebugMon_Handler(void) { - 800068c: b480 push {r7} - 800068e: af00 add r7, sp, #0 + 8000698: b480 push {r7} + 800069a: af00 add r7, sp, #0 } - 8000690: bf00 nop - 8000692: 46bd mov sp, r7 - 8000694: f85d 7b04 ldr.w r7, [sp], #4 - 8000698: 4770 bx lr + 800069c: bf00 nop + 800069e: 46bd mov sp, r7 + 80006a0: f85d 7b04 ldr.w r7, [sp], #4 + 80006a4: 4770 bx lr -0800069a : +080006a6 : * @brief This function handles PendSVC exception. * @param None * @retval None */ void PendSV_Handler(void) { - 800069a: b480 push {r7} - 800069c: af00 add r7, sp, #0 + 80006a6: b480 push {r7} + 80006a8: af00 add r7, sp, #0 } - 800069e: bf00 nop - 80006a0: 46bd mov sp, r7 - 80006a2: f85d 7b04 ldr.w r7, [sp], #4 - 80006a6: 4770 bx lr + 80006aa: bf00 nop + 80006ac: 46bd mov sp, r7 + 80006ae: f85d 7b04 ldr.w r7, [sp], #4 + 80006b2: 4770 bx lr -080006a8 : +080006b4 : * @brief This function handles SysTick Handler. * @param None * @retval None */ void SysTick_Handler(void) { - 80006a8: b580 push {r7, lr} - 80006aa: af00 add r7, sp, #0 + 80006b4: b580 push {r7, lr} + 80006b6: af00 add r7, sp, #0 HAL_IncTick(); - 80006ac: f000 f84e bl 800074c + 80006b8: f000 f84e bl 8000758 } - 80006b0: bf00 nop - 80006b2: bd80 pop {r7, pc} + 80006bc: bf00 nop + 80006be: bd80 pop {r7, pc} -080006b4 : +080006c0 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 80006b4: b580 push {r7, lr} - 80006b6: af00 add r7, sp, #0 + 80006c0: b580 push {r7, lr} + 80006c2: af00 add r7, sp, #0 /* Configure Flash prefetch, Instruction cache, Data cache */ #if (INSTRUCTION_CACHE_ENABLE != 0U) __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); - 80006b8: 4b0b ldr r3, [pc, #44] ; (80006e8 ) - 80006ba: 681b ldr r3, [r3, #0] - 80006bc: 4a0a ldr r2, [pc, #40] ; (80006e8 ) - 80006be: f443 7300 orr.w r3, r3, #512 ; 0x200 - 80006c2: 6013 str r3, [r2, #0] + 80006c4: 4b0b ldr r3, [pc, #44] ; (80006f4 ) + 80006c6: 681b ldr r3, [r3, #0] + 80006c8: 4a0a ldr r2, [pc, #40] ; (80006f4 ) + 80006ca: f443 7300 orr.w r3, r3, #512 ; 0x200 + 80006ce: 6013 str r3, [r2, #0] #if (DATA_CACHE_ENABLE != 0U) __HAL_FLASH_DATA_CACHE_ENABLE(); #endif /* DATA_CACHE_ENABLE */ #if (PREFETCH_ENABLE != 0U) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 80006c4: 4b08 ldr r3, [pc, #32] ; (80006e8 ) - 80006c6: 681b ldr r3, [r3, #0] - 80006c8: 4a07 ldr r2, [pc, #28] ; (80006e8 ) - 80006ca: f443 7380 orr.w r3, r3, #256 ; 0x100 - 80006ce: 6013 str r3, [r2, #0] + 80006d0: 4b08 ldr r3, [pc, #32] ; (80006f4 ) + 80006d2: 681b ldr r3, [r3, #0] + 80006d4: 4a07 ldr r2, [pc, #28] ; (80006f4 ) + 80006d6: f443 7380 orr.w r3, r3, #256 ; 0x100 + 80006da: 6013 str r3, [r2, #0] #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 80006d0: 2003 movs r0, #3 - 80006d2: f000 f931 bl 8000938 + 80006dc: 2003 movs r0, #3 + 80006de: f000 f931 bl 8000944 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); - 80006d6: 200f movs r0, #15 - 80006d8: f000 f808 bl 80006ec + 80006e2: 200f movs r0, #15 + 80006e4: f000 f808 bl 80006f8 /* Init the low level hardware */ HAL_MspInit(); - 80006dc: f000 fb3f bl 8000d5e + 80006e8: f000 fb3f bl 8000d6a /* Return function status */ return HAL_OK; - 80006e0: 2300 movs r3, #0 + 80006ec: 2300 movs r3, #0 } - 80006e2: 4618 mov r0, r3 - 80006e4: bd80 pop {r7, pc} - 80006e6: bf00 nop - 80006e8: 40023c00 .word 0x40023c00 + 80006ee: 4618 mov r0, r3 + 80006f0: bd80 pop {r7, pc} + 80006f2: bf00 nop + 80006f4: 40023c00 .word 0x40023c00 -080006ec : +080006f8 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 80006ec: b580 push {r7, lr} - 80006ee: b082 sub sp, #8 - 80006f0: af00 add r7, sp, #0 - 80006f2: 6078 str r0, [r7, #4] + 80006f8: b580 push {r7, lr} + 80006fa: b082 sub sp, #8 + 80006fc: af00 add r7, sp, #0 + 80006fe: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 80006f4: 4b12 ldr r3, [pc, #72] ; (8000740 ) - 80006f6: 681a ldr r2, [r3, #0] - 80006f8: 4b12 ldr r3, [pc, #72] ; (8000744 ) - 80006fa: 781b ldrb r3, [r3, #0] - 80006fc: 4619 mov r1, r3 - 80006fe: f44f 737a mov.w r3, #1000 ; 0x3e8 - 8000702: fbb3 f3f1 udiv r3, r3, r1 - 8000706: fbb2 f3f3 udiv r3, r2, r3 - 800070a: 4618 mov r0, r3 - 800070c: f000 f93b bl 8000986 - 8000710: 4603 mov r3, r0 - 8000712: 2b00 cmp r3, #0 - 8000714: d001 beq.n 800071a + 8000700: 4b12 ldr r3, [pc, #72] ; (800074c ) + 8000702: 681a ldr r2, [r3, #0] + 8000704: 4b12 ldr r3, [pc, #72] ; (8000750 ) + 8000706: 781b ldrb r3, [r3, #0] + 8000708: 4619 mov r1, r3 + 800070a: f44f 737a mov.w r3, #1000 ; 0x3e8 + 800070e: fbb3 f3f1 udiv r3, r3, r1 + 8000712: fbb2 f3f3 udiv r3, r2, r3 + 8000716: 4618 mov r0, r3 + 8000718: f000 f93b bl 8000992 + 800071c: 4603 mov r3, r0 + 800071e: 2b00 cmp r3, #0 + 8000720: d001 beq.n 8000726 { return HAL_ERROR; - 8000716: 2301 movs r3, #1 - 8000718: e00e b.n 8000738 + 8000722: 2301 movs r3, #1 + 8000724: e00e b.n 8000744 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 800071a: 687b ldr r3, [r7, #4] - 800071c: 2b0f cmp r3, #15 - 800071e: d80a bhi.n 8000736 + 8000726: 687b ldr r3, [r7, #4] + 8000728: 2b0f cmp r3, #15 + 800072a: d80a bhi.n 8000742 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 8000720: 2200 movs r2, #0 - 8000722: 6879 ldr r1, [r7, #4] - 8000724: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff - 8000728: f000 f911 bl 800094e + 800072c: 2200 movs r2, #0 + 800072e: 6879 ldr r1, [r7, #4] + 8000730: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff + 8000734: f000 f911 bl 800095a uwTickPrio = TickPriority; - 800072c: 4a06 ldr r2, [pc, #24] ; (8000748 ) - 800072e: 687b ldr r3, [r7, #4] - 8000730: 6013 str r3, [r2, #0] + 8000738: 4a06 ldr r2, [pc, #24] ; (8000754 ) + 800073a: 687b ldr r3, [r7, #4] + 800073c: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 8000732: 2300 movs r3, #0 - 8000734: e000 b.n 8000738 + 800073e: 2300 movs r3, #0 + 8000740: e000 b.n 8000744 return HAL_ERROR; - 8000736: 2301 movs r3, #1 + 8000742: 2301 movs r3, #1 } - 8000738: 4618 mov r0, r3 - 800073a: 3708 adds r7, #8 - 800073c: 46bd mov sp, r7 - 800073e: bd80 pop {r7, pc} - 8000740: 2000000c .word 0x2000000c - 8000744: 20000014 .word 0x20000014 - 8000748: 20000010 .word 0x20000010 - -0800074c : + 8000744: 4618 mov r0, r3 + 8000746: 3708 adds r7, #8 + 8000748: 46bd mov sp, r7 + 800074a: bd80 pop {r7, pc} + 800074c: 2000000c .word 0x2000000c + 8000750: 20000014 .word 0x20000014 + 8000754: 20000010 .word 0x20000010 + +08000758 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 800074c: b480 push {r7} - 800074e: af00 add r7, sp, #0 + 8000758: b480 push {r7} + 800075a: af00 add r7, sp, #0 uwTick += uwTickFreq; - 8000750: 4b06 ldr r3, [pc, #24] ; (800076c ) - 8000752: 781b ldrb r3, [r3, #0] - 8000754: 461a mov r2, r3 - 8000756: 4b06 ldr r3, [pc, #24] ; (8000770 ) - 8000758: 681b ldr r3, [r3, #0] - 800075a: 4413 add r3, r2 - 800075c: 4a04 ldr r2, [pc, #16] ; (8000770 ) - 800075e: 6013 str r3, [r2, #0] + 800075c: 4b06 ldr r3, [pc, #24] ; (8000778 ) + 800075e: 781b ldrb r3, [r3, #0] + 8000760: 461a mov r2, r3 + 8000762: 4b06 ldr r3, [pc, #24] ; (800077c ) + 8000764: 681b ldr r3, [r3, #0] + 8000766: 4413 add r3, r2 + 8000768: 4a04 ldr r2, [pc, #16] ; (800077c ) + 800076a: 6013 str r3, [r2, #0] } - 8000760: bf00 nop - 8000762: 46bd mov sp, r7 - 8000764: f85d 7b04 ldr.w r7, [sp], #4 - 8000768: 4770 bx lr - 800076a: bf00 nop - 800076c: 20000014 .word 0x20000014 - 8000770: 20000034 .word 0x20000034 - -08000774 : + 800076c: bf00 nop + 800076e: 46bd mov sp, r7 + 8000770: f85d 7b04 ldr.w r7, [sp], #4 + 8000774: 4770 bx lr + 8000776: bf00 nop + 8000778: 20000014 .word 0x20000014 + 800077c: 20000034 .word 0x20000034 + +08000780 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 8000774: b480 push {r7} - 8000776: af00 add r7, sp, #0 + 8000780: b480 push {r7} + 8000782: af00 add r7, sp, #0 return uwTick; - 8000778: 4b03 ldr r3, [pc, #12] ; (8000788 ) - 800077a: 681b ldr r3, [r3, #0] + 8000784: 4b03 ldr r3, [pc, #12] ; (8000794 ) + 8000786: 681b ldr r3, [r3, #0] } - 800077c: 4618 mov r0, r3 - 800077e: 46bd mov sp, r7 - 8000780: f85d 7b04 ldr.w r7, [sp], #4 - 8000784: 4770 bx lr - 8000786: bf00 nop - 8000788: 20000034 .word 0x20000034 - -0800078c : + 8000788: 4618 mov r0, r3 + 800078a: 46bd mov sp, r7 + 800078c: f85d 7b04 ldr.w r7, [sp], #4 + 8000790: 4770 bx lr + 8000792: bf00 nop + 8000794: 20000034 .word 0x20000034 + +08000798 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { - 800078c: b580 push {r7, lr} - 800078e: b084 sub sp, #16 - 8000790: af00 add r7, sp, #0 - 8000792: 6078 str r0, [r7, #4] + 8000798: b580 push {r7, lr} + 800079a: b084 sub sp, #16 + 800079c: af00 add r7, sp, #0 + 800079e: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); - 8000794: f7ff ffee bl 8000774 - 8000798: 60b8 str r0, [r7, #8] + 80007a0: f7ff ffee bl 8000780 + 80007a4: 60b8 str r0, [r7, #8] uint32_t wait = Delay; - 800079a: 687b ldr r3, [r7, #4] - 800079c: 60fb str r3, [r7, #12] + 80007a6: 687b ldr r3, [r7, #4] + 80007a8: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) - 800079e: 68fb ldr r3, [r7, #12] - 80007a0: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff - 80007a4: d005 beq.n 80007b2 + 80007aa: 68fb ldr r3, [r7, #12] + 80007ac: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff + 80007b0: d005 beq.n 80007be { wait += (uint32_t)(uwTickFreq); - 80007a6: 4b0a ldr r3, [pc, #40] ; (80007d0 ) - 80007a8: 781b ldrb r3, [r3, #0] - 80007aa: 461a mov r2, r3 - 80007ac: 68fb ldr r3, [r7, #12] - 80007ae: 4413 add r3, r2 - 80007b0: 60fb str r3, [r7, #12] + 80007b2: 4b0a ldr r3, [pc, #40] ; (80007dc ) + 80007b4: 781b ldrb r3, [r3, #0] + 80007b6: 461a mov r2, r3 + 80007b8: 68fb ldr r3, [r7, #12] + 80007ba: 4413 add r3, r2 + 80007bc: 60fb str r3, [r7, #12] } while((HAL_GetTick() - tickstart) < wait) - 80007b2: bf00 nop - 80007b4: f7ff ffde bl 8000774 - 80007b8: 4602 mov r2, r0 - 80007ba: 68bb ldr r3, [r7, #8] - 80007bc: 1ad3 subs r3, r2, r3 - 80007be: 68fa ldr r2, [r7, #12] - 80007c0: 429a cmp r2, r3 - 80007c2: d8f7 bhi.n 80007b4 + 80007be: bf00 nop + 80007c0: f7ff ffde bl 8000780 + 80007c4: 4602 mov r2, r0 + 80007c6: 68bb ldr r3, [r7, #8] + 80007c8: 1ad3 subs r3, r2, r3 + 80007ca: 68fa ldr r2, [r7, #12] + 80007cc: 429a cmp r2, r3 + 80007ce: d8f7 bhi.n 80007c0 { } } - 80007c4: bf00 nop - 80007c6: bf00 nop - 80007c8: 3710 adds r7, #16 - 80007ca: 46bd mov sp, r7 - 80007cc: bd80 pop {r7, pc} - 80007ce: bf00 nop - 80007d0: 20000014 .word 0x20000014 - -080007d4 <__NVIC_SetPriorityGrouping>: + 80007d0: bf00 nop + 80007d2: bf00 nop + 80007d4: 3710 adds r7, #16 + 80007d6: 46bd mov sp, r7 + 80007d8: bd80 pop {r7, pc} + 80007da: bf00 nop + 80007dc: 20000014 .word 0x20000014 + +080007e0 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 80007d4: b480 push {r7} - 80007d6: b085 sub sp, #20 - 80007d8: af00 add r7, sp, #0 - 80007da: 6078 str r0, [r7, #4] + 80007e0: b480 push {r7} + 80007e2: b085 sub sp, #20 + 80007e4: af00 add r7, sp, #0 + 80007e6: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 80007dc: 687b ldr r3, [r7, #4] - 80007de: f003 0307 and.w r3, r3, #7 - 80007e2: 60fb str r3, [r7, #12] + 80007e8: 687b ldr r3, [r7, #4] + 80007ea: f003 0307 and.w r3, r3, #7 + 80007ee: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ - 80007e4: 4b0c ldr r3, [pc, #48] ; (8000818 <__NVIC_SetPriorityGrouping+0x44>) - 80007e6: 68db ldr r3, [r3, #12] - 80007e8: 60bb str r3, [r7, #8] + 80007f0: 4b0c ldr r3, [pc, #48] ; (8000824 <__NVIC_SetPriorityGrouping+0x44>) + 80007f2: 68db ldr r3, [r3, #12] + 80007f4: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 80007ea: 68ba ldr r2, [r7, #8] - 80007ec: f64f 03ff movw r3, #63743 ; 0xf8ff - 80007f0: 4013 ands r3, r2 - 80007f2: 60bb str r3, [r7, #8] + 80007f6: 68ba ldr r2, [r7, #8] + 80007f8: f64f 03ff movw r3, #63743 ; 0xf8ff + 80007fc: 4013 ands r3, r2 + 80007fe: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 80007f4: 68fb ldr r3, [r7, #12] - 80007f6: 021a lsls r2, r3, #8 + 8000800: 68fb ldr r3, [r7, #12] + 8000802: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 80007f8: 68bb ldr r3, [r7, #8] - 80007fa: 4313 orrs r3, r2 + 8000804: 68bb ldr r3, [r7, #8] + 8000806: 4313 orrs r3, r2 reg_value = (reg_value | - 80007fc: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 - 8000800: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8000804: 60bb str r3, [r7, #8] + 8000808: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 + 800080c: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8000810: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; - 8000806: 4a04 ldr r2, [pc, #16] ; (8000818 <__NVIC_SetPriorityGrouping+0x44>) - 8000808: 68bb ldr r3, [r7, #8] - 800080a: 60d3 str r3, [r2, #12] + 8000812: 4a04 ldr r2, [pc, #16] ; (8000824 <__NVIC_SetPriorityGrouping+0x44>) + 8000814: 68bb ldr r3, [r7, #8] + 8000816: 60d3 str r3, [r2, #12] } - 800080c: bf00 nop - 800080e: 3714 adds r7, #20 - 8000810: 46bd mov sp, r7 - 8000812: f85d 7b04 ldr.w r7, [sp], #4 - 8000816: 4770 bx lr - 8000818: e000ed00 .word 0xe000ed00 - -0800081c <__NVIC_GetPriorityGrouping>: + 8000818: bf00 nop + 800081a: 3714 adds r7, #20 + 800081c: 46bd mov sp, r7 + 800081e: f85d 7b04 ldr.w r7, [sp], #4 + 8000822: 4770 bx lr + 8000824: e000ed00 .word 0xe000ed00 + +08000828 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { - 800081c: b480 push {r7} - 800081e: af00 add r7, sp, #0 + 8000828: b480 push {r7} + 800082a: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 8000820: 4b04 ldr r3, [pc, #16] ; (8000834 <__NVIC_GetPriorityGrouping+0x18>) - 8000822: 68db ldr r3, [r3, #12] - 8000824: 0a1b lsrs r3, r3, #8 - 8000826: f003 0307 and.w r3, r3, #7 + 800082c: 4b04 ldr r3, [pc, #16] ; (8000840 <__NVIC_GetPriorityGrouping+0x18>) + 800082e: 68db ldr r3, [r3, #12] + 8000830: 0a1b lsrs r3, r3, #8 + 8000832: f003 0307 and.w r3, r3, #7 } - 800082a: 4618 mov r0, r3 - 800082c: 46bd mov sp, r7 - 800082e: f85d 7b04 ldr.w r7, [sp], #4 - 8000832: 4770 bx lr - 8000834: e000ed00 .word 0xe000ed00 + 8000836: 4618 mov r0, r3 + 8000838: 46bd mov sp, r7 + 800083a: f85d 7b04 ldr.w r7, [sp], #4 + 800083e: 4770 bx lr + 8000840: e000ed00 .word 0xe000ed00 -08000838 <__NVIC_SetPriority>: +08000844 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8000838: b480 push {r7} - 800083a: b083 sub sp, #12 - 800083c: af00 add r7, sp, #0 - 800083e: 4603 mov r3, r0 - 8000840: 6039 str r1, [r7, #0] - 8000842: 71fb strb r3, [r7, #7] + 8000844: b480 push {r7} + 8000846: b083 sub sp, #12 + 8000848: af00 add r7, sp, #0 + 800084a: 4603 mov r3, r0 + 800084c: 6039 str r1, [r7, #0] + 800084e: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 8000844: f997 3007 ldrsb.w r3, [r7, #7] - 8000848: 2b00 cmp r3, #0 - 800084a: db0a blt.n 8000862 <__NVIC_SetPriority+0x2a> + 8000850: f997 3007 ldrsb.w r3, [r7, #7] + 8000854: 2b00 cmp r3, #0 + 8000856: db0a blt.n 800086e <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 800084c: 683b ldr r3, [r7, #0] - 800084e: b2da uxtb r2, r3 - 8000850: 490c ldr r1, [pc, #48] ; (8000884 <__NVIC_SetPriority+0x4c>) - 8000852: f997 3007 ldrsb.w r3, [r7, #7] - 8000856: 0112 lsls r2, r2, #4 - 8000858: b2d2 uxtb r2, r2 - 800085a: 440b add r3, r1 - 800085c: f883 2300 strb.w r2, [r3, #768] ; 0x300 + 8000858: 683b ldr r3, [r7, #0] + 800085a: b2da uxtb r2, r3 + 800085c: 490c ldr r1, [pc, #48] ; (8000890 <__NVIC_SetPriority+0x4c>) + 800085e: f997 3007 ldrsb.w r3, [r7, #7] + 8000862: 0112 lsls r2, r2, #4 + 8000864: b2d2 uxtb r2, r2 + 8000866: 440b add r3, r1 + 8000868: f883 2300 strb.w r2, [r3, #768] ; 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } - 8000860: e00a b.n 8000878 <__NVIC_SetPriority+0x40> + 800086c: e00a b.n 8000884 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8000862: 683b ldr r3, [r7, #0] - 8000864: b2da uxtb r2, r3 - 8000866: 4908 ldr r1, [pc, #32] ; (8000888 <__NVIC_SetPriority+0x50>) - 8000868: 79fb ldrb r3, [r7, #7] - 800086a: f003 030f and.w r3, r3, #15 - 800086e: 3b04 subs r3, #4 - 8000870: 0112 lsls r2, r2, #4 - 8000872: b2d2 uxtb r2, r2 - 8000874: 440b add r3, r1 - 8000876: 761a strb r2, [r3, #24] + 800086e: 683b ldr r3, [r7, #0] + 8000870: b2da uxtb r2, r3 + 8000872: 4908 ldr r1, [pc, #32] ; (8000894 <__NVIC_SetPriority+0x50>) + 8000874: 79fb ldrb r3, [r7, #7] + 8000876: f003 030f and.w r3, r3, #15 + 800087a: 3b04 subs r3, #4 + 800087c: 0112 lsls r2, r2, #4 + 800087e: b2d2 uxtb r2, r2 + 8000880: 440b add r3, r1 + 8000882: 761a strb r2, [r3, #24] } - 8000878: bf00 nop - 800087a: 370c adds r7, #12 - 800087c: 46bd mov sp, r7 - 800087e: f85d 7b04 ldr.w r7, [sp], #4 - 8000882: 4770 bx lr - 8000884: e000e100 .word 0xe000e100 - 8000888: e000ed00 .word 0xe000ed00 - -0800088c : + 8000884: bf00 nop + 8000886: 370c adds r7, #12 + 8000888: 46bd mov sp, r7 + 800088a: f85d 7b04 ldr.w r7, [sp], #4 + 800088e: 4770 bx lr + 8000890: e000e100 .word 0xe000e100 + 8000894: e000ed00 .word 0xe000ed00 + +08000898 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { - 800088c: b480 push {r7} - 800088e: b089 sub sp, #36 ; 0x24 - 8000890: af00 add r7, sp, #0 - 8000892: 60f8 str r0, [r7, #12] - 8000894: 60b9 str r1, [r7, #8] - 8000896: 607a str r2, [r7, #4] + 8000898: b480 push {r7} + 800089a: b089 sub sp, #36 ; 0x24 + 800089c: af00 add r7, sp, #0 + 800089e: 60f8 str r0, [r7, #12] + 80008a0: 60b9 str r1, [r7, #8] + 80008a2: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8000898: 68fb ldr r3, [r7, #12] - 800089a: f003 0307 and.w r3, r3, #7 - 800089e: 61fb str r3, [r7, #28] + 80008a4: 68fb ldr r3, [r7, #12] + 80008a6: f003 0307 and.w r3, r3, #7 + 80008aa: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 80008a0: 69fb ldr r3, [r7, #28] - 80008a2: f1c3 0307 rsb r3, r3, #7 - 80008a6: 2b04 cmp r3, #4 - 80008a8: bf28 it cs - 80008aa: 2304 movcs r3, #4 - 80008ac: 61bb str r3, [r7, #24] + 80008ac: 69fb ldr r3, [r7, #28] + 80008ae: f1c3 0307 rsb r3, r3, #7 + 80008b2: 2b04 cmp r3, #4 + 80008b4: bf28 it cs + 80008b6: 2304 movcs r3, #4 + 80008b8: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 80008ae: 69fb ldr r3, [r7, #28] - 80008b0: 3304 adds r3, #4 - 80008b2: 2b06 cmp r3, #6 - 80008b4: d902 bls.n 80008bc - 80008b6: 69fb ldr r3, [r7, #28] - 80008b8: 3b03 subs r3, #3 - 80008ba: e000 b.n 80008be - 80008bc: 2300 movs r3, #0 - 80008be: 617b str r3, [r7, #20] + 80008ba: 69fb ldr r3, [r7, #28] + 80008bc: 3304 adds r3, #4 + 80008be: 2b06 cmp r3, #6 + 80008c0: d902 bls.n 80008c8 + 80008c2: 69fb ldr r3, [r7, #28] + 80008c4: 3b03 subs r3, #3 + 80008c6: e000 b.n 80008ca + 80008c8: 2300 movs r3, #0 + 80008ca: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 80008c0: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff - 80008c4: 69bb ldr r3, [r7, #24] - 80008c6: fa02 f303 lsl.w r3, r2, r3 - 80008ca: 43da mvns r2, r3 - 80008cc: 68bb ldr r3, [r7, #8] - 80008ce: 401a ands r2, r3 - 80008d0: 697b ldr r3, [r7, #20] - 80008d2: 409a lsls r2, r3 + 80008cc: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff + 80008d0: 69bb ldr r3, [r7, #24] + 80008d2: fa02 f303 lsl.w r3, r2, r3 + 80008d6: 43da mvns r2, r3 + 80008d8: 68bb ldr r3, [r7, #8] + 80008da: 401a ands r2, r3 + 80008dc: 697b ldr r3, [r7, #20] + 80008de: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 80008d4: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff - 80008d8: 697b ldr r3, [r7, #20] - 80008da: fa01 f303 lsl.w r3, r1, r3 - 80008de: 43d9 mvns r1, r3 - 80008e0: 687b ldr r3, [r7, #4] - 80008e2: 400b ands r3, r1 + 80008e0: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff + 80008e4: 697b ldr r3, [r7, #20] + 80008e6: fa01 f303 lsl.w r3, r1, r3 + 80008ea: 43d9 mvns r1, r3 + 80008ec: 687b ldr r3, [r7, #4] + 80008ee: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 80008e4: 4313 orrs r3, r2 + 80008f0: 4313 orrs r3, r2 ); } - 80008e6: 4618 mov r0, r3 - 80008e8: 3724 adds r7, #36 ; 0x24 - 80008ea: 46bd mov sp, r7 - 80008ec: f85d 7b04 ldr.w r7, [sp], #4 - 80008f0: 4770 bx lr + 80008f2: 4618 mov r0, r3 + 80008f4: 3724 adds r7, #36 ; 0x24 + 80008f6: 46bd mov sp, r7 + 80008f8: f85d 7b04 ldr.w r7, [sp], #4 + 80008fc: 4770 bx lr ... -080008f4 : +08000900 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 80008f4: b580 push {r7, lr} - 80008f6: b082 sub sp, #8 - 80008f8: af00 add r7, sp, #0 - 80008fa: 6078 str r0, [r7, #4] + 8000900: b580 push {r7, lr} + 8000902: b082 sub sp, #8 + 8000904: af00 add r7, sp, #0 + 8000906: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 80008fc: 687b ldr r3, [r7, #4] - 80008fe: 3b01 subs r3, #1 - 8000900: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 8000904: d301 bcc.n 800090a + 8000908: 687b ldr r3, [r7, #4] + 800090a: 3b01 subs r3, #1 + 800090c: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 8000910: d301 bcc.n 8000916 { return (1UL); /* Reload value impossible */ - 8000906: 2301 movs r3, #1 - 8000908: e00f b.n 800092a + 8000912: 2301 movs r3, #1 + 8000914: e00f b.n 8000936 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 800090a: 4a0a ldr r2, [pc, #40] ; (8000934 ) - 800090c: 687b ldr r3, [r7, #4] - 800090e: 3b01 subs r3, #1 - 8000910: 6053 str r3, [r2, #4] + 8000916: 4a0a ldr r2, [pc, #40] ; (8000940 ) + 8000918: 687b ldr r3, [r7, #4] + 800091a: 3b01 subs r3, #1 + 800091c: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 8000912: 210f movs r1, #15 - 8000914: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff - 8000918: f7ff ff8e bl 8000838 <__NVIC_SetPriority> + 800091e: 210f movs r1, #15 + 8000920: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff + 8000924: f7ff ff8e bl 8000844 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 800091c: 4b05 ldr r3, [pc, #20] ; (8000934 ) - 800091e: 2200 movs r2, #0 - 8000920: 609a str r2, [r3, #8] + 8000928: 4b05 ldr r3, [pc, #20] ; (8000940 ) + 800092a: 2200 movs r2, #0 + 800092c: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8000922: 4b04 ldr r3, [pc, #16] ; (8000934 ) - 8000924: 2207 movs r2, #7 - 8000926: 601a str r2, [r3, #0] + 800092e: 4b04 ldr r3, [pc, #16] ; (8000940 ) + 8000930: 2207 movs r2, #7 + 8000932: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 8000928: 2300 movs r3, #0 + 8000934: 2300 movs r3, #0 } - 800092a: 4618 mov r0, r3 - 800092c: 3708 adds r7, #8 - 800092e: 46bd mov sp, r7 - 8000930: bd80 pop {r7, pc} - 8000932: bf00 nop - 8000934: e000e010 .word 0xe000e010 - -08000938 : + 8000936: 4618 mov r0, r3 + 8000938: 3708 adds r7, #8 + 800093a: 46bd mov sp, r7 + 800093c: bd80 pop {r7, pc} + 800093e: bf00 nop + 8000940: e000e010 .word 0xe000e010 + +08000944 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8000938: b580 push {r7, lr} - 800093a: b082 sub sp, #8 - 800093c: af00 add r7, sp, #0 - 800093e: 6078 str r0, [r7, #4] + 8000944: b580 push {r7, lr} + 8000946: b082 sub sp, #8 + 8000948: af00 add r7, sp, #0 + 800094a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); - 8000940: 6878 ldr r0, [r7, #4] - 8000942: f7ff ff47 bl 80007d4 <__NVIC_SetPriorityGrouping> + 800094c: 6878 ldr r0, [r7, #4] + 800094e: f7ff ff47 bl 80007e0 <__NVIC_SetPriorityGrouping> } - 8000946: bf00 nop - 8000948: 3708 adds r7, #8 - 800094a: 46bd mov sp, r7 - 800094c: bd80 pop {r7, pc} + 8000952: bf00 nop + 8000954: 3708 adds r7, #8 + 8000956: 46bd mov sp, r7 + 8000958: bd80 pop {r7, pc} -0800094e : +0800095a : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 800094e: b580 push {r7, lr} - 8000950: b086 sub sp, #24 - 8000952: af00 add r7, sp, #0 - 8000954: 4603 mov r3, r0 - 8000956: 60b9 str r1, [r7, #8] - 8000958: 607a str r2, [r7, #4] - 800095a: 73fb strb r3, [r7, #15] + 800095a: b580 push {r7, lr} + 800095c: b086 sub sp, #24 + 800095e: af00 add r7, sp, #0 + 8000960: 4603 mov r3, r0 + 8000962: 60b9 str r1, [r7, #8] + 8000964: 607a str r2, [r7, #4] + 8000966: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; - 800095c: 2300 movs r3, #0 - 800095e: 617b str r3, [r7, #20] + 8000968: 2300 movs r3, #0 + 800096a: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 8000960: f7ff ff5c bl 800081c <__NVIC_GetPriorityGrouping> - 8000964: 6178 str r0, [r7, #20] + 800096c: f7ff ff5c bl 8000828 <__NVIC_GetPriorityGrouping> + 8000970: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 8000966: 687a ldr r2, [r7, #4] - 8000968: 68b9 ldr r1, [r7, #8] - 800096a: 6978 ldr r0, [r7, #20] - 800096c: f7ff ff8e bl 800088c - 8000970: 4602 mov r2, r0 - 8000972: f997 300f ldrsb.w r3, [r7, #15] - 8000976: 4611 mov r1, r2 - 8000978: 4618 mov r0, r3 - 800097a: f7ff ff5d bl 8000838 <__NVIC_SetPriority> + 8000972: 687a ldr r2, [r7, #4] + 8000974: 68b9 ldr r1, [r7, #8] + 8000976: 6978 ldr r0, [r7, #20] + 8000978: f7ff ff8e bl 8000898 + 800097c: 4602 mov r2, r0 + 800097e: f997 300f ldrsb.w r3, [r7, #15] + 8000982: 4611 mov r1, r2 + 8000984: 4618 mov r0, r3 + 8000986: f7ff ff5d bl 8000844 <__NVIC_SetPriority> } - 800097e: bf00 nop - 8000980: 3718 adds r7, #24 - 8000982: 46bd mov sp, r7 - 8000984: bd80 pop {r7, pc} + 800098a: bf00 nop + 800098c: 3718 adds r7, #24 + 800098e: 46bd mov sp, r7 + 8000990: bd80 pop {r7, pc} -08000986 : +08000992 : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 8000986: b580 push {r7, lr} - 8000988: b082 sub sp, #8 - 800098a: af00 add r7, sp, #0 - 800098c: 6078 str r0, [r7, #4] + 8000992: b580 push {r7, lr} + 8000994: b082 sub sp, #8 + 8000996: af00 add r7, sp, #0 + 8000998: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 800098e: 6878 ldr r0, [r7, #4] - 8000990: f7ff ffb0 bl 80008f4 - 8000994: 4603 mov r3, r0 + 800099a: 6878 ldr r0, [r7, #4] + 800099c: f7ff ffb0 bl 8000900 + 80009a0: 4603 mov r3, r0 } - 8000996: 4618 mov r0, r3 - 8000998: 3708 adds r7, #8 - 800099a: 46bd mov sp, r7 - 800099c: bd80 pop {r7, pc} + 80009a2: 4618 mov r0, r3 + 80009a4: 3708 adds r7, #8 + 80009a6: 46bd mov sp, r7 + 80009a8: bd80 pop {r7, pc} ... -080009a0 : +080009ac : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 80009a0: b480 push {r7} - 80009a2: b089 sub sp, #36 ; 0x24 - 80009a4: af00 add r7, sp, #0 - 80009a6: 6078 str r0, [r7, #4] - 80009a8: 6039 str r1, [r7, #0] + 80009ac: b480 push {r7} + 80009ae: b089 sub sp, #36 ; 0x24 + 80009b0: af00 add r7, sp, #0 + 80009b2: 6078 str r0, [r7, #4] + 80009b4: 6039 str r1, [r7, #0] uint32_t position; uint32_t ioposition = 0x00U; - 80009aa: 2300 movs r3, #0 - 80009ac: 617b str r3, [r7, #20] + 80009b6: 2300 movs r3, #0 + 80009b8: 617b str r3, [r7, #20] uint32_t iocurrent = 0x00U; - 80009ae: 2300 movs r3, #0 - 80009b0: 613b str r3, [r7, #16] + 80009ba: 2300 movs r3, #0 + 80009bc: 613b str r3, [r7, #16] uint32_t temp = 0x00U; - 80009b2: 2300 movs r3, #0 - 80009b4: 61bb str r3, [r7, #24] + 80009be: 2300 movs r3, #0 + 80009c0: 61bb str r3, [r7, #24] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for(position = 0U; position < GPIO_NUMBER; position++) - 80009b6: 2300 movs r3, #0 - 80009b8: 61fb str r3, [r7, #28] - 80009ba: e177 b.n 8000cac + 80009c2: 2300 movs r3, #0 + 80009c4: 61fb str r3, [r7, #28] + 80009c6: e177 b.n 8000cb8 { /* Get the IO position */ ioposition = 0x01U << position; - 80009bc: 2201 movs r2, #1 - 80009be: 69fb ldr r3, [r7, #28] - 80009c0: fa02 f303 lsl.w r3, r2, r3 - 80009c4: 617b str r3, [r7, #20] + 80009c8: 2201 movs r2, #1 + 80009ca: 69fb ldr r3, [r7, #28] + 80009cc: fa02 f303 lsl.w r3, r2, r3 + 80009d0: 617b str r3, [r7, #20] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; - 80009c6: 683b ldr r3, [r7, #0] - 80009c8: 681b ldr r3, [r3, #0] - 80009ca: 697a ldr r2, [r7, #20] - 80009cc: 4013 ands r3, r2 - 80009ce: 613b str r3, [r7, #16] + 80009d2: 683b ldr r3, [r7, #0] + 80009d4: 681b ldr r3, [r3, #0] + 80009d6: 697a ldr r2, [r7, #20] + 80009d8: 4013 ands r3, r2 + 80009da: 613b str r3, [r7, #16] if(iocurrent == ioposition) - 80009d0: 693a ldr r2, [r7, #16] - 80009d2: 697b ldr r3, [r7, #20] - 80009d4: 429a cmp r2, r3 - 80009d6: f040 8166 bne.w 8000ca6 + 80009dc: 693a ldr r2, [r7, #16] + 80009de: 697b ldr r3, [r7, #20] + 80009e0: 429a cmp r2, r3 + 80009e2: f040 8166 bne.w 8000cb2 { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ - 80009da: 683b ldr r3, [r7, #0] - 80009dc: 685b ldr r3, [r3, #4] - 80009de: f003 0303 and.w r3, r3, #3 - 80009e2: 2b01 cmp r3, #1 - 80009e4: d005 beq.n 80009f2 - (GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 80009e6: 683b ldr r3, [r7, #0] 80009e8: 685b ldr r3, [r3, #4] 80009ea: f003 0303 and.w r3, r3, #3 + 80009ee: 2b01 cmp r3, #1 + 80009f0: d005 beq.n 80009fe + (GPIO_Init->Mode & GPIO_MODE) == MODE_AF) + 80009f2: 683b ldr r3, [r7, #0] + 80009f4: 685b ldr r3, [r3, #4] + 80009f6: f003 0303 and.w r3, r3, #3 if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ - 80009ee: 2b02 cmp r3, #2 - 80009f0: d130 bne.n 8000a54 + 80009fa: 2b02 cmp r3, #2 + 80009fc: d130 bne.n 8000a60 { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 80009f2: 687b ldr r3, [r7, #4] - 80009f4: 689b ldr r3, [r3, #8] - 80009f6: 61bb str r3, [r7, #24] + 80009fe: 687b ldr r3, [r7, #4] + 8000a00: 689b ldr r3, [r3, #8] + 8000a02: 61bb str r3, [r7, #24] temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U)); - 80009f8: 69fb ldr r3, [r7, #28] - 80009fa: 005b lsls r3, r3, #1 - 80009fc: 2203 movs r2, #3 - 80009fe: fa02 f303 lsl.w r3, r2, r3 - 8000a02: 43db mvns r3, r3 - 8000a04: 69ba ldr r2, [r7, #24] - 8000a06: 4013 ands r3, r2 - 8000a08: 61bb str r3, [r7, #24] + 8000a04: 69fb ldr r3, [r7, #28] + 8000a06: 005b lsls r3, r3, #1 + 8000a08: 2203 movs r2, #3 + 8000a0a: fa02 f303 lsl.w r3, r2, r3 + 8000a0e: 43db mvns r3, r3 + 8000a10: 69ba ldr r2, [r7, #24] + 8000a12: 4013 ands r3, r2 + 8000a14: 61bb str r3, [r7, #24] temp |= (GPIO_Init->Speed << (position * 2U)); - 8000a0a: 683b ldr r3, [r7, #0] - 8000a0c: 68da ldr r2, [r3, #12] - 8000a0e: 69fb ldr r3, [r7, #28] - 8000a10: 005b lsls r3, r3, #1 - 8000a12: fa02 f303 lsl.w r3, r2, r3 - 8000a16: 69ba ldr r2, [r7, #24] - 8000a18: 4313 orrs r3, r2 - 8000a1a: 61bb str r3, [r7, #24] + 8000a16: 683b ldr r3, [r7, #0] + 8000a18: 68da ldr r2, [r3, #12] + 8000a1a: 69fb ldr r3, [r7, #28] + 8000a1c: 005b lsls r3, r3, #1 + 8000a1e: fa02 f303 lsl.w r3, r2, r3 + 8000a22: 69ba ldr r2, [r7, #24] + 8000a24: 4313 orrs r3, r2 + 8000a26: 61bb str r3, [r7, #24] GPIOx->OSPEEDR = temp; - 8000a1c: 687b ldr r3, [r7, #4] - 8000a1e: 69ba ldr r2, [r7, #24] - 8000a20: 609a str r2, [r3, #8] + 8000a28: 687b ldr r3, [r7, #4] + 8000a2a: 69ba ldr r2, [r7, #24] + 8000a2c: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; - 8000a22: 687b ldr r3, [r7, #4] - 8000a24: 685b ldr r3, [r3, #4] - 8000a26: 61bb str r3, [r7, #24] + 8000a2e: 687b ldr r3, [r7, #4] + 8000a30: 685b ldr r3, [r3, #4] + 8000a32: 61bb str r3, [r7, #24] temp &= ~(GPIO_OTYPER_OT_0 << position) ; - 8000a28: 2201 movs r2, #1 - 8000a2a: 69fb ldr r3, [r7, #28] - 8000a2c: fa02 f303 lsl.w r3, r2, r3 - 8000a30: 43db mvns r3, r3 - 8000a32: 69ba ldr r2, [r7, #24] - 8000a34: 4013 ands r3, r2 - 8000a36: 61bb str r3, [r7, #24] + 8000a34: 2201 movs r2, #1 + 8000a36: 69fb ldr r3, [r7, #28] + 8000a38: fa02 f303 lsl.w r3, r2, r3 + 8000a3c: 43db mvns r3, r3 + 8000a3e: 69ba ldr r2, [r7, #24] + 8000a40: 4013 ands r3, r2 + 8000a42: 61bb str r3, [r7, #24] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); - 8000a38: 683b ldr r3, [r7, #0] - 8000a3a: 685b ldr r3, [r3, #4] - 8000a3c: 091b lsrs r3, r3, #4 - 8000a3e: f003 0201 and.w r2, r3, #1 - 8000a42: 69fb ldr r3, [r7, #28] - 8000a44: fa02 f303 lsl.w r3, r2, r3 - 8000a48: 69ba ldr r2, [r7, #24] - 8000a4a: 4313 orrs r3, r2 - 8000a4c: 61bb str r3, [r7, #24] + 8000a44: 683b ldr r3, [r7, #0] + 8000a46: 685b ldr r3, [r3, #4] + 8000a48: 091b lsrs r3, r3, #4 + 8000a4a: f003 0201 and.w r2, r3, #1 + 8000a4e: 69fb ldr r3, [r7, #28] + 8000a50: fa02 f303 lsl.w r3, r2, r3 + 8000a54: 69ba ldr r2, [r7, #24] + 8000a56: 4313 orrs r3, r2 + 8000a58: 61bb str r3, [r7, #24] GPIOx->OTYPER = temp; - 8000a4e: 687b ldr r3, [r7, #4] - 8000a50: 69ba ldr r2, [r7, #24] - 8000a52: 605a str r2, [r3, #4] + 8000a5a: 687b ldr r3, [r7, #4] + 8000a5c: 69ba ldr r2, [r7, #24] + 8000a5e: 605a str r2, [r3, #4] } if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) - 8000a54: 683b ldr r3, [r7, #0] - 8000a56: 685b ldr r3, [r3, #4] - 8000a58: f003 0303 and.w r3, r3, #3 - 8000a5c: 2b03 cmp r3, #3 - 8000a5e: d017 beq.n 8000a90 + 8000a60: 683b ldr r3, [r7, #0] + 8000a62: 685b ldr r3, [r3, #4] + 8000a64: f003 0303 and.w r3, r3, #3 + 8000a68: 2b03 cmp r3, #3 + 8000a6a: d017 beq.n 8000a9c { /* Check the parameters */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; - 8000a60: 687b ldr r3, [r7, #4] - 8000a62: 68db ldr r3, [r3, #12] - 8000a64: 61bb str r3, [r7, #24] + 8000a6c: 687b ldr r3, [r7, #4] + 8000a6e: 68db ldr r3, [r3, #12] + 8000a70: 61bb str r3, [r7, #24] temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); - 8000a66: 69fb ldr r3, [r7, #28] - 8000a68: 005b lsls r3, r3, #1 - 8000a6a: 2203 movs r2, #3 - 8000a6c: fa02 f303 lsl.w r3, r2, r3 - 8000a70: 43db mvns r3, r3 - 8000a72: 69ba ldr r2, [r7, #24] - 8000a74: 4013 ands r3, r2 - 8000a76: 61bb str r3, [r7, #24] + 8000a72: 69fb ldr r3, [r7, #28] + 8000a74: 005b lsls r3, r3, #1 + 8000a76: 2203 movs r2, #3 + 8000a78: fa02 f303 lsl.w r3, r2, r3 + 8000a7c: 43db mvns r3, r3 + 8000a7e: 69ba ldr r2, [r7, #24] + 8000a80: 4013 ands r3, r2 + 8000a82: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Pull) << (position * 2U)); - 8000a78: 683b ldr r3, [r7, #0] - 8000a7a: 689a ldr r2, [r3, #8] - 8000a7c: 69fb ldr r3, [r7, #28] - 8000a7e: 005b lsls r3, r3, #1 - 8000a80: fa02 f303 lsl.w r3, r2, r3 - 8000a84: 69ba ldr r2, [r7, #24] - 8000a86: 4313 orrs r3, r2 - 8000a88: 61bb str r3, [r7, #24] + 8000a84: 683b ldr r3, [r7, #0] + 8000a86: 689a ldr r2, [r3, #8] + 8000a88: 69fb ldr r3, [r7, #28] + 8000a8a: 005b lsls r3, r3, #1 + 8000a8c: fa02 f303 lsl.w r3, r2, r3 + 8000a90: 69ba ldr r2, [r7, #24] + 8000a92: 4313 orrs r3, r2 + 8000a94: 61bb str r3, [r7, #24] GPIOx->PUPDR = temp; - 8000a8a: 687b ldr r3, [r7, #4] - 8000a8c: 69ba ldr r2, [r7, #24] - 8000a8e: 60da str r2, [r3, #12] + 8000a96: 687b ldr r3, [r7, #4] + 8000a98: 69ba ldr r2, [r7, #24] + 8000a9a: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 8000a90: 683b ldr r3, [r7, #0] - 8000a92: 685b ldr r3, [r3, #4] - 8000a94: f003 0303 and.w r3, r3, #3 - 8000a98: 2b02 cmp r3, #2 - 8000a9a: d123 bne.n 8000ae4 + 8000a9c: 683b ldr r3, [r7, #0] + 8000a9e: 685b ldr r3, [r3, #4] + 8000aa0: f003 0303 and.w r3, r3, #3 + 8000aa4: 2b02 cmp r3, #2 + 8000aa6: d123 bne.n 8000af0 { /* Check the Alternate function parameter */ assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3U]; - 8000a9c: 69fb ldr r3, [r7, #28] - 8000a9e: 08da lsrs r2, r3, #3 - 8000aa0: 687b ldr r3, [r7, #4] - 8000aa2: 3208 adds r2, #8 - 8000aa4: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 8000aa8: 61bb str r3, [r7, #24] + 8000aa8: 69fb ldr r3, [r7, #28] + 8000aaa: 08da lsrs r2, r3, #3 + 8000aac: 687b ldr r3, [r7, #4] + 8000aae: 3208 adds r2, #8 + 8000ab0: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 8000ab4: 61bb str r3, [r7, #24] temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ; - 8000aaa: 69fb ldr r3, [r7, #28] - 8000aac: f003 0307 and.w r3, r3, #7 - 8000ab0: 009b lsls r3, r3, #2 - 8000ab2: 220f movs r2, #15 - 8000ab4: fa02 f303 lsl.w r3, r2, r3 - 8000ab8: 43db mvns r3, r3 - 8000aba: 69ba ldr r2, [r7, #24] - 8000abc: 4013 ands r3, r2 - 8000abe: 61bb str r3, [r7, #24] + 8000ab6: 69fb ldr r3, [r7, #28] + 8000ab8: f003 0307 and.w r3, r3, #7 + 8000abc: 009b lsls r3, r3, #2 + 8000abe: 220f movs r2, #15 + 8000ac0: fa02 f303 lsl.w r3, r2, r3 + 8000ac4: 43db mvns r3, r3 + 8000ac6: 69ba ldr r2, [r7, #24] + 8000ac8: 4013 ands r3, r2 + 8000aca: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U)); - 8000ac0: 683b ldr r3, [r7, #0] - 8000ac2: 691a ldr r2, [r3, #16] - 8000ac4: 69fb ldr r3, [r7, #28] - 8000ac6: f003 0307 and.w r3, r3, #7 - 8000aca: 009b lsls r3, r3, #2 - 8000acc: fa02 f303 lsl.w r3, r2, r3 - 8000ad0: 69ba ldr r2, [r7, #24] - 8000ad2: 4313 orrs r3, r2 - 8000ad4: 61bb str r3, [r7, #24] + 8000acc: 683b ldr r3, [r7, #0] + 8000ace: 691a ldr r2, [r3, #16] + 8000ad0: 69fb ldr r3, [r7, #28] + 8000ad2: f003 0307 and.w r3, r3, #7 + 8000ad6: 009b lsls r3, r3, #2 + 8000ad8: fa02 f303 lsl.w r3, r2, r3 + 8000adc: 69ba ldr r2, [r7, #24] + 8000ade: 4313 orrs r3, r2 + 8000ae0: 61bb str r3, [r7, #24] GPIOx->AFR[position >> 3U] = temp; - 8000ad6: 69fb ldr r3, [r7, #28] - 8000ad8: 08da lsrs r2, r3, #3 - 8000ada: 687b ldr r3, [r7, #4] - 8000adc: 3208 adds r2, #8 - 8000ade: 69b9 ldr r1, [r7, #24] - 8000ae0: f843 1022 str.w r1, [r3, r2, lsl #2] + 8000ae2: 69fb ldr r3, [r7, #28] + 8000ae4: 08da lsrs r2, r3, #3 + 8000ae6: 687b ldr r3, [r7, #4] + 8000ae8: 3208 adds r2, #8 + 8000aea: 69b9 ldr r1, [r7, #24] + 8000aec: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; - 8000ae4: 687b ldr r3, [r7, #4] - 8000ae6: 681b ldr r3, [r3, #0] - 8000ae8: 61bb str r3, [r7, #24] + 8000af0: 687b ldr r3, [r7, #4] + 8000af2: 681b ldr r3, [r3, #0] + 8000af4: 61bb str r3, [r7, #24] temp &= ~(GPIO_MODER_MODER0 << (position * 2U)); - 8000aea: 69fb ldr r3, [r7, #28] - 8000aec: 005b lsls r3, r3, #1 - 8000aee: 2203 movs r2, #3 - 8000af0: fa02 f303 lsl.w r3, r2, r3 - 8000af4: 43db mvns r3, r3 - 8000af6: 69ba ldr r2, [r7, #24] - 8000af8: 4013 ands r3, r2 - 8000afa: 61bb str r3, [r7, #24] + 8000af6: 69fb ldr r3, [r7, #28] + 8000af8: 005b lsls r3, r3, #1 + 8000afa: 2203 movs r2, #3 + 8000afc: fa02 f303 lsl.w r3, r2, r3 + 8000b00: 43db mvns r3, r3 + 8000b02: 69ba ldr r2, [r7, #24] + 8000b04: 4013 ands r3, r2 + 8000b06: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); - 8000afc: 683b ldr r3, [r7, #0] - 8000afe: 685b ldr r3, [r3, #4] - 8000b00: f003 0203 and.w r2, r3, #3 - 8000b04: 69fb ldr r3, [r7, #28] - 8000b06: 005b lsls r3, r3, #1 - 8000b08: fa02 f303 lsl.w r3, r2, r3 - 8000b0c: 69ba ldr r2, [r7, #24] - 8000b0e: 4313 orrs r3, r2 - 8000b10: 61bb str r3, [r7, #24] + 8000b08: 683b ldr r3, [r7, #0] + 8000b0a: 685b ldr r3, [r3, #4] + 8000b0c: f003 0203 and.w r2, r3, #3 + 8000b10: 69fb ldr r3, [r7, #28] + 8000b12: 005b lsls r3, r3, #1 + 8000b14: fa02 f303 lsl.w r3, r2, r3 + 8000b18: 69ba ldr r2, [r7, #24] + 8000b1a: 4313 orrs r3, r2 + 8000b1c: 61bb str r3, [r7, #24] GPIOx->MODER = temp; - 8000b12: 687b ldr r3, [r7, #4] - 8000b14: 69ba ldr r2, [r7, #24] - 8000b16: 601a str r2, [r3, #0] + 8000b1e: 687b ldr r3, [r7, #4] + 8000b20: 69ba ldr r2, [r7, #24] + 8000b22: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if((GPIO_Init->Mode & EXTI_MODE) != 0x00U) - 8000b18: 683b ldr r3, [r7, #0] - 8000b1a: 685b ldr r3, [r3, #4] - 8000b1c: f403 3340 and.w r3, r3, #196608 ; 0x30000 - 8000b20: 2b00 cmp r3, #0 - 8000b22: f000 80c0 beq.w 8000ca6 + 8000b24: 683b ldr r3, [r7, #0] + 8000b26: 685b ldr r3, [r3, #4] + 8000b28: f403 3340 and.w r3, r3, #196608 ; 0x30000 + 8000b2c: 2b00 cmp r3, #0 + 8000b2e: f000 80c0 beq.w 8000cb2 { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8000b26: 2300 movs r3, #0 - 8000b28: 60fb str r3, [r7, #12] - 8000b2a: 4b66 ldr r3, [pc, #408] ; (8000cc4 ) - 8000b2c: 6c5b ldr r3, [r3, #68] ; 0x44 - 8000b2e: 4a65 ldr r2, [pc, #404] ; (8000cc4 ) - 8000b30: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 8000b34: 6453 str r3, [r2, #68] ; 0x44 - 8000b36: 4b63 ldr r3, [pc, #396] ; (8000cc4 ) + 8000b32: 2300 movs r3, #0 + 8000b34: 60fb str r3, [r7, #12] + 8000b36: 4b66 ldr r3, [pc, #408] ; (8000cd0 ) 8000b38: 6c5b ldr r3, [r3, #68] ; 0x44 - 8000b3a: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8000b3e: 60fb str r3, [r7, #12] - 8000b40: 68fb ldr r3, [r7, #12] + 8000b3a: 4a65 ldr r2, [pc, #404] ; (8000cd0 ) + 8000b3c: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 8000b40: 6453 str r3, [r2, #68] ; 0x44 + 8000b42: 4b63 ldr r3, [pc, #396] ; (8000cd0 ) + 8000b44: 6c5b ldr r3, [r3, #68] ; 0x44 + 8000b46: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 8000b4a: 60fb str r3, [r7, #12] + 8000b4c: 68fb ldr r3, [r7, #12] temp = SYSCFG->EXTICR[position >> 2U]; - 8000b42: 4a61 ldr r2, [pc, #388] ; (8000cc8 ) - 8000b44: 69fb ldr r3, [r7, #28] - 8000b46: 089b lsrs r3, r3, #2 - 8000b48: 3302 adds r3, #2 - 8000b4a: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8000b4e: 61bb str r3, [r7, #24] - temp &= ~(0x0FU << (4U * (position & 0x03U))); + 8000b4e: 4a61 ldr r2, [pc, #388] ; (8000cd4 ) 8000b50: 69fb ldr r3, [r7, #28] - 8000b52: f003 0303 and.w r3, r3, #3 - 8000b56: 009b lsls r3, r3, #2 - 8000b58: 220f movs r2, #15 - 8000b5a: fa02 f303 lsl.w r3, r2, r3 - 8000b5e: 43db mvns r3, r3 - 8000b60: 69ba ldr r2, [r7, #24] - 8000b62: 4013 ands r3, r2 - 8000b64: 61bb str r3, [r7, #24] + 8000b52: 089b lsrs r3, r3, #2 + 8000b54: 3302 adds r3, #2 + 8000b56: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8000b5a: 61bb str r3, [r7, #24] + temp &= ~(0x0FU << (4U * (position & 0x03U))); + 8000b5c: 69fb ldr r3, [r7, #28] + 8000b5e: f003 0303 and.w r3, r3, #3 + 8000b62: 009b lsls r3, r3, #2 + 8000b64: 220f movs r2, #15 + 8000b66: fa02 f303 lsl.w r3, r2, r3 + 8000b6a: 43db mvns r3, r3 + 8000b6c: 69ba ldr r2, [r7, #24] + 8000b6e: 4013 ands r3, r2 + 8000b70: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); - 8000b66: 687b ldr r3, [r7, #4] - 8000b68: 4a58 ldr r2, [pc, #352] ; (8000ccc ) - 8000b6a: 4293 cmp r3, r2 - 8000b6c: d037 beq.n 8000bde - 8000b6e: 687b ldr r3, [r7, #4] - 8000b70: 4a57 ldr r2, [pc, #348] ; (8000cd0 ) - 8000b72: 4293 cmp r3, r2 - 8000b74: d031 beq.n 8000bda - 8000b76: 687b ldr r3, [r7, #4] - 8000b78: 4a56 ldr r2, [pc, #344] ; (8000cd4 ) - 8000b7a: 4293 cmp r3, r2 - 8000b7c: d02b beq.n 8000bd6 - 8000b7e: 687b ldr r3, [r7, #4] - 8000b80: 4a55 ldr r2, [pc, #340] ; (8000cd8 ) - 8000b82: 4293 cmp r3, r2 - 8000b84: d025 beq.n 8000bd2 - 8000b86: 687b ldr r3, [r7, #4] - 8000b88: 4a54 ldr r2, [pc, #336] ; (8000cdc ) - 8000b8a: 4293 cmp r3, r2 - 8000b8c: d01f beq.n 8000bce - 8000b8e: 687b ldr r3, [r7, #4] - 8000b90: 4a53 ldr r2, [pc, #332] ; (8000ce0 ) - 8000b92: 4293 cmp r3, r2 - 8000b94: d019 beq.n 8000bca - 8000b96: 687b ldr r3, [r7, #4] - 8000b98: 4a52 ldr r2, [pc, #328] ; (8000ce4 ) - 8000b9a: 4293 cmp r3, r2 - 8000b9c: d013 beq.n 8000bc6 - 8000b9e: 687b ldr r3, [r7, #4] - 8000ba0: 4a51 ldr r2, [pc, #324] ; (8000ce8 ) - 8000ba2: 4293 cmp r3, r2 - 8000ba4: d00d beq.n 8000bc2 - 8000ba6: 687b ldr r3, [r7, #4] - 8000ba8: 4a50 ldr r2, [pc, #320] ; (8000cec ) - 8000baa: 4293 cmp r3, r2 - 8000bac: d007 beq.n 8000bbe - 8000bae: 687b ldr r3, [r7, #4] - 8000bb0: 4a4f ldr r2, [pc, #316] ; (8000cf0 ) - 8000bb2: 4293 cmp r3, r2 - 8000bb4: d101 bne.n 8000bba - 8000bb6: 2309 movs r3, #9 - 8000bb8: e012 b.n 8000be0 - 8000bba: 230a movs r3, #10 - 8000bbc: e010 b.n 8000be0 - 8000bbe: 2308 movs r3, #8 - 8000bc0: e00e b.n 8000be0 - 8000bc2: 2307 movs r3, #7 - 8000bc4: e00c b.n 8000be0 - 8000bc6: 2306 movs r3, #6 - 8000bc8: e00a b.n 8000be0 - 8000bca: 2305 movs r3, #5 - 8000bcc: e008 b.n 8000be0 - 8000bce: 2304 movs r3, #4 - 8000bd0: e006 b.n 8000be0 - 8000bd2: 2303 movs r3, #3 - 8000bd4: e004 b.n 8000be0 - 8000bd6: 2302 movs r3, #2 - 8000bd8: e002 b.n 8000be0 - 8000bda: 2301 movs r3, #1 - 8000bdc: e000 b.n 8000be0 - 8000bde: 2300 movs r3, #0 - 8000be0: 69fa ldr r2, [r7, #28] - 8000be2: f002 0203 and.w r2, r2, #3 - 8000be6: 0092 lsls r2, r2, #2 - 8000be8: 4093 lsls r3, r2 - 8000bea: 69ba ldr r2, [r7, #24] - 8000bec: 4313 orrs r3, r2 - 8000bee: 61bb str r3, [r7, #24] + 8000b72: 687b ldr r3, [r7, #4] + 8000b74: 4a58 ldr r2, [pc, #352] ; (8000cd8 ) + 8000b76: 4293 cmp r3, r2 + 8000b78: d037 beq.n 8000bea + 8000b7a: 687b ldr r3, [r7, #4] + 8000b7c: 4a57 ldr r2, [pc, #348] ; (8000cdc ) + 8000b7e: 4293 cmp r3, r2 + 8000b80: d031 beq.n 8000be6 + 8000b82: 687b ldr r3, [r7, #4] + 8000b84: 4a56 ldr r2, [pc, #344] ; (8000ce0 ) + 8000b86: 4293 cmp r3, r2 + 8000b88: d02b beq.n 8000be2 + 8000b8a: 687b ldr r3, [r7, #4] + 8000b8c: 4a55 ldr r2, [pc, #340] ; (8000ce4 ) + 8000b8e: 4293 cmp r3, r2 + 8000b90: d025 beq.n 8000bde + 8000b92: 687b ldr r3, [r7, #4] + 8000b94: 4a54 ldr r2, [pc, #336] ; (8000ce8 ) + 8000b96: 4293 cmp r3, r2 + 8000b98: d01f beq.n 8000bda + 8000b9a: 687b ldr r3, [r7, #4] + 8000b9c: 4a53 ldr r2, [pc, #332] ; (8000cec ) + 8000b9e: 4293 cmp r3, r2 + 8000ba0: d019 beq.n 8000bd6 + 8000ba2: 687b ldr r3, [r7, #4] + 8000ba4: 4a52 ldr r2, [pc, #328] ; (8000cf0 ) + 8000ba6: 4293 cmp r3, r2 + 8000ba8: d013 beq.n 8000bd2 + 8000baa: 687b ldr r3, [r7, #4] + 8000bac: 4a51 ldr r2, [pc, #324] ; (8000cf4 ) + 8000bae: 4293 cmp r3, r2 + 8000bb0: d00d beq.n 8000bce + 8000bb2: 687b ldr r3, [r7, #4] + 8000bb4: 4a50 ldr r2, [pc, #320] ; (8000cf8 ) + 8000bb6: 4293 cmp r3, r2 + 8000bb8: d007 beq.n 8000bca + 8000bba: 687b ldr r3, [r7, #4] + 8000bbc: 4a4f ldr r2, [pc, #316] ; (8000cfc ) + 8000bbe: 4293 cmp r3, r2 + 8000bc0: d101 bne.n 8000bc6 + 8000bc2: 2309 movs r3, #9 + 8000bc4: e012 b.n 8000bec + 8000bc6: 230a movs r3, #10 + 8000bc8: e010 b.n 8000bec + 8000bca: 2308 movs r3, #8 + 8000bcc: e00e b.n 8000bec + 8000bce: 2307 movs r3, #7 + 8000bd0: e00c b.n 8000bec + 8000bd2: 2306 movs r3, #6 + 8000bd4: e00a b.n 8000bec + 8000bd6: 2305 movs r3, #5 + 8000bd8: e008 b.n 8000bec + 8000bda: 2304 movs r3, #4 + 8000bdc: e006 b.n 8000bec + 8000bde: 2303 movs r3, #3 + 8000be0: e004 b.n 8000bec + 8000be2: 2302 movs r3, #2 + 8000be4: e002 b.n 8000bec + 8000be6: 2301 movs r3, #1 + 8000be8: e000 b.n 8000bec + 8000bea: 2300 movs r3, #0 + 8000bec: 69fa ldr r2, [r7, #28] + 8000bee: f002 0203 and.w r2, r2, #3 + 8000bf2: 0092 lsls r2, r2, #2 + 8000bf4: 4093 lsls r3, r2 + 8000bf6: 69ba ldr r2, [r7, #24] + 8000bf8: 4313 orrs r3, r2 + 8000bfa: 61bb str r3, [r7, #24] SYSCFG->EXTICR[position >> 2U] = temp; - 8000bf0: 4935 ldr r1, [pc, #212] ; (8000cc8 ) - 8000bf2: 69fb ldr r3, [r7, #28] - 8000bf4: 089b lsrs r3, r3, #2 - 8000bf6: 3302 adds r3, #2 - 8000bf8: 69ba ldr r2, [r7, #24] - 8000bfa: f841 2023 str.w r2, [r1, r3, lsl #2] + 8000bfc: 4935 ldr r1, [pc, #212] ; (8000cd4 ) + 8000bfe: 69fb ldr r3, [r7, #28] + 8000c00: 089b lsrs r3, r3, #2 + 8000c02: 3302 adds r3, #2 + 8000c04: 69ba ldr r2, [r7, #24] + 8000c06: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear EXTI line configuration */ temp = EXTI->IMR; - 8000bfe: 4b3d ldr r3, [pc, #244] ; (8000cf4 ) - 8000c00: 681b ldr r3, [r3, #0] - 8000c02: 61bb str r3, [r7, #24] + 8000c0a: 4b3d ldr r3, [pc, #244] ; (8000d00 ) + 8000c0c: 681b ldr r3, [r3, #0] + 8000c0e: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); - 8000c04: 693b ldr r3, [r7, #16] - 8000c06: 43db mvns r3, r3 - 8000c08: 69ba ldr r2, [r7, #24] - 8000c0a: 4013 ands r3, r2 - 8000c0c: 61bb str r3, [r7, #24] + 8000c10: 693b ldr r3, [r7, #16] + 8000c12: 43db mvns r3, r3 + 8000c14: 69ba ldr r2, [r7, #24] + 8000c16: 4013 ands r3, r2 + 8000c18: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & EXTI_IT) != 0x00U) - 8000c0e: 683b ldr r3, [r7, #0] - 8000c10: 685b ldr r3, [r3, #4] - 8000c12: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8000c16: 2b00 cmp r3, #0 - 8000c18: d003 beq.n 8000c22 + 8000c1a: 683b ldr r3, [r7, #0] + 8000c1c: 685b ldr r3, [r3, #4] + 8000c1e: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8000c22: 2b00 cmp r3, #0 + 8000c24: d003 beq.n 8000c2e { temp |= iocurrent; - 8000c1a: 69ba ldr r2, [r7, #24] - 8000c1c: 693b ldr r3, [r7, #16] - 8000c1e: 4313 orrs r3, r2 - 8000c20: 61bb str r3, [r7, #24] + 8000c26: 69ba ldr r2, [r7, #24] + 8000c28: 693b ldr r3, [r7, #16] + 8000c2a: 4313 orrs r3, r2 + 8000c2c: 61bb str r3, [r7, #24] } EXTI->IMR = temp; - 8000c22: 4a34 ldr r2, [pc, #208] ; (8000cf4 ) - 8000c24: 69bb ldr r3, [r7, #24] - 8000c26: 6013 str r3, [r2, #0] + 8000c2e: 4a34 ldr r2, [pc, #208] ; (8000d00 ) + 8000c30: 69bb ldr r3, [r7, #24] + 8000c32: 6013 str r3, [r2, #0] temp = EXTI->EMR; - 8000c28: 4b32 ldr r3, [pc, #200] ; (8000cf4 ) - 8000c2a: 685b ldr r3, [r3, #4] - 8000c2c: 61bb str r3, [r7, #24] + 8000c34: 4b32 ldr r3, [pc, #200] ; (8000d00 ) + 8000c36: 685b ldr r3, [r3, #4] + 8000c38: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); - 8000c2e: 693b ldr r3, [r7, #16] - 8000c30: 43db mvns r3, r3 - 8000c32: 69ba ldr r2, [r7, #24] - 8000c34: 4013 ands r3, r2 - 8000c36: 61bb str r3, [r7, #24] + 8000c3a: 693b ldr r3, [r7, #16] + 8000c3c: 43db mvns r3, r3 + 8000c3e: 69ba ldr r2, [r7, #24] + 8000c40: 4013 ands r3, r2 + 8000c42: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & EXTI_EVT) != 0x00U) - 8000c38: 683b ldr r3, [r7, #0] - 8000c3a: 685b ldr r3, [r3, #4] - 8000c3c: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8000c40: 2b00 cmp r3, #0 - 8000c42: d003 beq.n 8000c4c + 8000c44: 683b ldr r3, [r7, #0] + 8000c46: 685b ldr r3, [r3, #4] + 8000c48: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8000c4c: 2b00 cmp r3, #0 + 8000c4e: d003 beq.n 8000c58 { temp |= iocurrent; - 8000c44: 69ba ldr r2, [r7, #24] - 8000c46: 693b ldr r3, [r7, #16] - 8000c48: 4313 orrs r3, r2 - 8000c4a: 61bb str r3, [r7, #24] + 8000c50: 69ba ldr r2, [r7, #24] + 8000c52: 693b ldr r3, [r7, #16] + 8000c54: 4313 orrs r3, r2 + 8000c56: 61bb str r3, [r7, #24] } EXTI->EMR = temp; - 8000c4c: 4a29 ldr r2, [pc, #164] ; (8000cf4 ) - 8000c4e: 69bb ldr r3, [r7, #24] - 8000c50: 6053 str r3, [r2, #4] + 8000c58: 4a29 ldr r2, [pc, #164] ; (8000d00 ) + 8000c5a: 69bb ldr r3, [r7, #24] + 8000c5c: 6053 str r3, [r2, #4] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; - 8000c52: 4b28 ldr r3, [pc, #160] ; (8000cf4 ) - 8000c54: 689b ldr r3, [r3, #8] - 8000c56: 61bb str r3, [r7, #24] + 8000c5e: 4b28 ldr r3, [pc, #160] ; (8000d00 ) + 8000c60: 689b ldr r3, [r3, #8] + 8000c62: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); - 8000c58: 693b ldr r3, [r7, #16] - 8000c5a: 43db mvns r3, r3 - 8000c5c: 69ba ldr r2, [r7, #24] - 8000c5e: 4013 ands r3, r2 - 8000c60: 61bb str r3, [r7, #24] + 8000c64: 693b ldr r3, [r7, #16] + 8000c66: 43db mvns r3, r3 + 8000c68: 69ba ldr r2, [r7, #24] + 8000c6a: 4013 ands r3, r2 + 8000c6c: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) - 8000c62: 683b ldr r3, [r7, #0] - 8000c64: 685b ldr r3, [r3, #4] - 8000c66: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 8000c6a: 2b00 cmp r3, #0 - 8000c6c: d003 beq.n 8000c76 + 8000c6e: 683b ldr r3, [r7, #0] + 8000c70: 685b ldr r3, [r3, #4] + 8000c72: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 8000c76: 2b00 cmp r3, #0 + 8000c78: d003 beq.n 8000c82 { temp |= iocurrent; - 8000c6e: 69ba ldr r2, [r7, #24] - 8000c70: 693b ldr r3, [r7, #16] - 8000c72: 4313 orrs r3, r2 - 8000c74: 61bb str r3, [r7, #24] + 8000c7a: 69ba ldr r2, [r7, #24] + 8000c7c: 693b ldr r3, [r7, #16] + 8000c7e: 4313 orrs r3, r2 + 8000c80: 61bb str r3, [r7, #24] } EXTI->RTSR = temp; - 8000c76: 4a1f ldr r2, [pc, #124] ; (8000cf4 ) - 8000c78: 69bb ldr r3, [r7, #24] - 8000c7a: 6093 str r3, [r2, #8] + 8000c82: 4a1f ldr r2, [pc, #124] ; (8000d00 ) + 8000c84: 69bb ldr r3, [r7, #24] + 8000c86: 6093 str r3, [r2, #8] temp = EXTI->FTSR; - 8000c7c: 4b1d ldr r3, [pc, #116] ; (8000cf4 ) - 8000c7e: 68db ldr r3, [r3, #12] - 8000c80: 61bb str r3, [r7, #24] + 8000c88: 4b1d ldr r3, [pc, #116] ; (8000d00 ) + 8000c8a: 68db ldr r3, [r3, #12] + 8000c8c: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); - 8000c82: 693b ldr r3, [r7, #16] - 8000c84: 43db mvns r3, r3 - 8000c86: 69ba ldr r2, [r7, #24] - 8000c88: 4013 ands r3, r2 - 8000c8a: 61bb str r3, [r7, #24] + 8000c8e: 693b ldr r3, [r7, #16] + 8000c90: 43db mvns r3, r3 + 8000c92: 69ba ldr r2, [r7, #24] + 8000c94: 4013 ands r3, r2 + 8000c96: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) - 8000c8c: 683b ldr r3, [r7, #0] - 8000c8e: 685b ldr r3, [r3, #4] - 8000c90: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 8000c94: 2b00 cmp r3, #0 - 8000c96: d003 beq.n 8000ca0 + 8000c98: 683b ldr r3, [r7, #0] + 8000c9a: 685b ldr r3, [r3, #4] + 8000c9c: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 8000ca0: 2b00 cmp r3, #0 + 8000ca2: d003 beq.n 8000cac { temp |= iocurrent; - 8000c98: 69ba ldr r2, [r7, #24] - 8000c9a: 693b ldr r3, [r7, #16] - 8000c9c: 4313 orrs r3, r2 - 8000c9e: 61bb str r3, [r7, #24] + 8000ca4: 69ba ldr r2, [r7, #24] + 8000ca6: 693b ldr r3, [r7, #16] + 8000ca8: 4313 orrs r3, r2 + 8000caa: 61bb str r3, [r7, #24] } EXTI->FTSR = temp; - 8000ca0: 4a14 ldr r2, [pc, #80] ; (8000cf4 ) - 8000ca2: 69bb ldr r3, [r7, #24] - 8000ca4: 60d3 str r3, [r2, #12] + 8000cac: 4a14 ldr r2, [pc, #80] ; (8000d00 ) + 8000cae: 69bb ldr r3, [r7, #24] + 8000cb0: 60d3 str r3, [r2, #12] for(position = 0U; position < GPIO_NUMBER; position++) - 8000ca6: 69fb ldr r3, [r7, #28] - 8000ca8: 3301 adds r3, #1 - 8000caa: 61fb str r3, [r7, #28] - 8000cac: 69fb ldr r3, [r7, #28] - 8000cae: 2b0f cmp r3, #15 - 8000cb0: f67f ae84 bls.w 80009bc + 8000cb2: 69fb ldr r3, [r7, #28] + 8000cb4: 3301 adds r3, #1 + 8000cb6: 61fb str r3, [r7, #28] + 8000cb8: 69fb ldr r3, [r7, #28] + 8000cba: 2b0f cmp r3, #15 + 8000cbc: f67f ae84 bls.w 80009c8 } } } } - 8000cb4: bf00 nop - 8000cb6: bf00 nop - 8000cb8: 3724 adds r7, #36 ; 0x24 - 8000cba: 46bd mov sp, r7 - 8000cbc: f85d 7b04 ldr.w r7, [sp], #4 - 8000cc0: 4770 bx lr + 8000cc0: bf00 nop 8000cc2: bf00 nop - 8000cc4: 40023800 .word 0x40023800 - 8000cc8: 40013800 .word 0x40013800 - 8000ccc: 40020000 .word 0x40020000 - 8000cd0: 40020400 .word 0x40020400 - 8000cd4: 40020800 .word 0x40020800 - 8000cd8: 40020c00 .word 0x40020c00 - 8000cdc: 40021000 .word 0x40021000 - 8000ce0: 40021400 .word 0x40021400 - 8000ce4: 40021800 .word 0x40021800 - 8000ce8: 40021c00 .word 0x40021c00 - 8000cec: 40022000 .word 0x40022000 - 8000cf0: 40022400 .word 0x40022400 - 8000cf4: 40013c00 .word 0x40013c00 - -08000cf8 : + 8000cc4: 3724 adds r7, #36 ; 0x24 + 8000cc6: 46bd mov sp, r7 + 8000cc8: f85d 7b04 ldr.w r7, [sp], #4 + 8000ccc: 4770 bx lr + 8000cce: bf00 nop + 8000cd0: 40023800 .word 0x40023800 + 8000cd4: 40013800 .word 0x40013800 + 8000cd8: 40020000 .word 0x40020000 + 8000cdc: 40020400 .word 0x40020400 + 8000ce0: 40020800 .word 0x40020800 + 8000ce4: 40020c00 .word 0x40020c00 + 8000ce8: 40021000 .word 0x40021000 + 8000cec: 40021400 .word 0x40021400 + 8000cf0: 40021800 .word 0x40021800 + 8000cf4: 40021c00 .word 0x40021c00 + 8000cf8: 40022000 .word 0x40022000 + 8000cfc: 40022400 .word 0x40022400 + 8000d00: 40013c00 .word 0x40013c00 + +08000d04 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 8000cf8: b480 push {r7} - 8000cfa: b083 sub sp, #12 - 8000cfc: af00 add r7, sp, #0 - 8000cfe: 6078 str r0, [r7, #4] - 8000d00: 460b mov r3, r1 - 8000d02: 807b strh r3, [r7, #2] - 8000d04: 4613 mov r3, r2 - 8000d06: 707b strb r3, [r7, #1] + 8000d04: b480 push {r7} + 8000d06: b083 sub sp, #12 + 8000d08: af00 add r7, sp, #0 + 8000d0a: 6078 str r0, [r7, #4] + 8000d0c: 460b mov r3, r1 + 8000d0e: 807b strh r3, [r7, #2] + 8000d10: 4613 mov r3, r2 + 8000d12: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if(PinState != GPIO_PIN_RESET) - 8000d08: 787b ldrb r3, [r7, #1] - 8000d0a: 2b00 cmp r3, #0 - 8000d0c: d003 beq.n 8000d16 + 8000d14: 787b ldrb r3, [r7, #1] + 8000d16: 2b00 cmp r3, #0 + 8000d18: d003 beq.n 8000d22 { GPIOx->BSRR = GPIO_Pin; - 8000d0e: 887a ldrh r2, [r7, #2] - 8000d10: 687b ldr r3, [r7, #4] - 8000d12: 619a str r2, [r3, #24] + 8000d1a: 887a ldrh r2, [r7, #2] + 8000d1c: 687b ldr r3, [r7, #4] + 8000d1e: 619a str r2, [r3, #24] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; } } - 8000d14: e003 b.n 8000d1e + 8000d20: e003 b.n 8000d2a GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; - 8000d16: 887b ldrh r3, [r7, #2] - 8000d18: 041a lsls r2, r3, #16 - 8000d1a: 687b ldr r3, [r7, #4] - 8000d1c: 619a str r2, [r3, #24] + 8000d22: 887b ldrh r3, [r7, #2] + 8000d24: 041a lsls r2, r3, #16 + 8000d26: 687b ldr r3, [r7, #4] + 8000d28: 619a str r2, [r3, #24] } - 8000d1e: bf00 nop - 8000d20: 370c adds r7, #12 - 8000d22: 46bd mov sp, r7 - 8000d24: f85d 7b04 ldr.w r7, [sp], #4 - 8000d28: 4770 bx lr + 8000d2a: bf00 nop + 8000d2c: 370c adds r7, #12 + 8000d2e: 46bd mov sp, r7 + 8000d30: f85d 7b04 ldr.w r7, [sp], #4 + 8000d34: 4770 bx lr -08000d2a : +08000d36 : * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices. * @param GPIO_Pin Specifies the pins to be toggled. * @retval None */ void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) { - 8000d2a: b480 push {r7} - 8000d2c: b085 sub sp, #20 - 8000d2e: af00 add r7, sp, #0 - 8000d30: 6078 str r0, [r7, #4] - 8000d32: 460b mov r3, r1 - 8000d34: 807b strh r3, [r7, #2] + 8000d36: b480 push {r7} + 8000d38: b085 sub sp, #20 + 8000d3a: af00 add r7, sp, #0 + 8000d3c: 6078 str r0, [r7, #4] + 8000d3e: 460b mov r3, r1 + 8000d40: 807b strh r3, [r7, #2] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); /* get current Ouput Data Register value */ odr = GPIOx->ODR; - 8000d36: 687b ldr r3, [r7, #4] - 8000d38: 695b ldr r3, [r3, #20] - 8000d3a: 60fb str r3, [r7, #12] + 8000d42: 687b ldr r3, [r7, #4] + 8000d44: 695b ldr r3, [r3, #20] + 8000d46: 60fb str r3, [r7, #12] /* Set selected pins that were at low level, and reset ones that were high */ GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); - 8000d3c: 887a ldrh r2, [r7, #2] - 8000d3e: 68fb ldr r3, [r7, #12] - 8000d40: 4013 ands r3, r2 - 8000d42: 041a lsls r2, r3, #16 - 8000d44: 68fb ldr r3, [r7, #12] - 8000d46: 43d9 mvns r1, r3 - 8000d48: 887b ldrh r3, [r7, #2] - 8000d4a: 400b ands r3, r1 - 8000d4c: 431a orrs r2, r3 - 8000d4e: 687b ldr r3, [r7, #4] - 8000d50: 619a str r2, [r3, #24] + 8000d48: 887a ldrh r2, [r7, #2] + 8000d4a: 68fb ldr r3, [r7, #12] + 8000d4c: 4013 ands r3, r2 + 8000d4e: 041a lsls r2, r3, #16 + 8000d50: 68fb ldr r3, [r7, #12] + 8000d52: 43d9 mvns r1, r3 + 8000d54: 887b ldrh r3, [r7, #2] + 8000d56: 400b ands r3, r1 + 8000d58: 431a orrs r2, r3 + 8000d5a: 687b ldr r3, [r7, #4] + 8000d5c: 619a str r2, [r3, #24] } - 8000d52: bf00 nop - 8000d54: 3714 adds r7, #20 - 8000d56: 46bd mov sp, r7 - 8000d58: f85d 7b04 ldr.w r7, [sp], #4 - 8000d5c: 4770 bx lr + 8000d5e: bf00 nop + 8000d60: 3714 adds r7, #20 + 8000d62: 46bd mov sp, r7 + 8000d64: f85d 7b04 ldr.w r7, [sp], #4 + 8000d68: 4770 bx lr -08000d5e : +08000d6a : * @note This function is called from HAL_Init() function to perform system * level initialization (GPIOs, clock, DMA, interrupt). * @retval None */ void HAL_MspInit(void) { - 8000d5e: b480 push {r7} - 8000d60: af00 add r7, sp, #0 + 8000d6a: b480 push {r7} + 8000d6c: af00 add r7, sp, #0 } - 8000d62: bf00 nop - 8000d64: 46bd mov sp, r7 - 8000d66: f85d 7b04 ldr.w r7, [sp], #4 - 8000d6a: 4770 bx lr + 8000d6e: bf00 nop + 8000d70: 46bd mov sp, r7 + 8000d72: f85d 7b04 ldr.w r7, [sp], #4 + 8000d76: 4770 bx lr -08000d6c : +08000d78 : * During the Over-drive switch activation, no peripheral clocks should be enabled. * The peripheral clocks must be enabled once the Over-drive mode is activated. * @retval HAL status */ HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void) { - 8000d6c: b580 push {r7, lr} - 8000d6e: b082 sub sp, #8 - 8000d70: af00 add r7, sp, #0 + 8000d78: b580 push {r7, lr} + 8000d7a: b082 sub sp, #8 + 8000d7c: af00 add r7, sp, #0 uint32_t tickstart = 0U; - 8000d72: 2300 movs r3, #0 - 8000d74: 607b str r3, [r7, #4] + 8000d7e: 2300 movs r3, #0 + 8000d80: 607b str r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); - 8000d76: 2300 movs r3, #0 - 8000d78: 603b str r3, [r7, #0] - 8000d7a: 4b20 ldr r3, [pc, #128] ; (8000dfc ) - 8000d7c: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000d7e: 4a1f ldr r2, [pc, #124] ; (8000dfc ) - 8000d80: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8000d84: 6413 str r3, [r2, #64] ; 0x40 - 8000d86: 4b1d ldr r3, [pc, #116] ; (8000dfc ) + 8000d82: 2300 movs r3, #0 + 8000d84: 603b str r3, [r7, #0] + 8000d86: 4b20 ldr r3, [pc, #128] ; (8000e08 ) 8000d88: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000d8a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8000d8e: 603b str r3, [r7, #0] - 8000d90: 683b ldr r3, [r7, #0] + 8000d8a: 4a1f ldr r2, [pc, #124] ; (8000e08 ) + 8000d8c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 8000d90: 6413 str r3, [r2, #64] ; 0x40 + 8000d92: 4b1d ldr r3, [pc, #116] ; (8000e08 ) + 8000d94: 6c1b ldr r3, [r3, #64] ; 0x40 + 8000d96: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8000d9a: 603b str r3, [r7, #0] + 8000d9c: 683b ldr r3, [r7, #0] /* Enable the Over-drive to extend the clock frequency to 180 Mhz */ __HAL_PWR_OVERDRIVE_ENABLE(); - 8000d92: 4b1b ldr r3, [pc, #108] ; (8000e00 ) - 8000d94: 2201 movs r2, #1 - 8000d96: 601a str r2, [r3, #0] + 8000d9e: 4b1b ldr r3, [pc, #108] ; (8000e0c ) + 8000da0: 2201 movs r2, #1 + 8000da2: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); - 8000d98: f7ff fcec bl 8000774 - 8000d9c: 6078 str r0, [r7, #4] + 8000da4: f7ff fcec bl 8000780 + 8000da8: 6078 str r0, [r7, #4] while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) - 8000d9e: e009 b.n 8000db4 + 8000daa: e009 b.n 8000dc0 { if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE) - 8000da0: f7ff fce8 bl 8000774 - 8000da4: 4602 mov r2, r0 - 8000da6: 687b ldr r3, [r7, #4] - 8000da8: 1ad3 subs r3, r2, r3 - 8000daa: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 - 8000dae: d901 bls.n 8000db4 + 8000dac: f7ff fce8 bl 8000780 + 8000db0: 4602 mov r2, r0 + 8000db2: 687b ldr r3, [r7, #4] + 8000db4: 1ad3 subs r3, r2, r3 + 8000db6: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 + 8000dba: d901 bls.n 8000dc0 { return HAL_TIMEOUT; - 8000db0: 2303 movs r3, #3 - 8000db2: e01f b.n 8000df4 + 8000dbc: 2303 movs r3, #3 + 8000dbe: e01f b.n 8000e00 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) - 8000db4: 4b13 ldr r3, [pc, #76] ; (8000e04 ) - 8000db6: 685b ldr r3, [r3, #4] - 8000db8: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8000dbc: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8000dc0: d1ee bne.n 8000da0 + 8000dc0: 4b13 ldr r3, [pc, #76] ; (8000e10 ) + 8000dc2: 685b ldr r3, [r3, #4] + 8000dc4: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8000dc8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8000dcc: d1ee bne.n 8000dac } } /* Enable the Over-drive switch */ __HAL_PWR_OVERDRIVESWITCHING_ENABLE(); - 8000dc2: 4b11 ldr r3, [pc, #68] ; (8000e08 ) - 8000dc4: 2201 movs r2, #1 - 8000dc6: 601a str r2, [r3, #0] + 8000dce: 4b11 ldr r3, [pc, #68] ; (8000e14 ) + 8000dd0: 2201 movs r2, #1 + 8000dd2: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); - 8000dc8: f7ff fcd4 bl 8000774 - 8000dcc: 6078 str r0, [r7, #4] + 8000dd4: f7ff fcd4 bl 8000780 + 8000dd8: 6078 str r0, [r7, #4] while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) - 8000dce: e009 b.n 8000de4 + 8000dda: e009 b.n 8000df0 { if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) - 8000dd0: f7ff fcd0 bl 8000774 - 8000dd4: 4602 mov r2, r0 - 8000dd6: 687b ldr r3, [r7, #4] - 8000dd8: 1ad3 subs r3, r2, r3 - 8000dda: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 - 8000dde: d901 bls.n 8000de4 + 8000ddc: f7ff fcd0 bl 8000780 + 8000de0: 4602 mov r2, r0 + 8000de2: 687b ldr r3, [r7, #4] + 8000de4: 1ad3 subs r3, r2, r3 + 8000de6: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 + 8000dea: d901 bls.n 8000df0 { return HAL_TIMEOUT; - 8000de0: 2303 movs r3, #3 - 8000de2: e007 b.n 8000df4 + 8000dec: 2303 movs r3, #3 + 8000dee: e007 b.n 8000e00 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) - 8000de4: 4b07 ldr r3, [pc, #28] ; (8000e04 ) - 8000de6: 685b ldr r3, [r3, #4] - 8000de8: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8000dec: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8000df0: d1ee bne.n 8000dd0 + 8000df0: 4b07 ldr r3, [pc, #28] ; (8000e10 ) + 8000df2: 685b ldr r3, [r3, #4] + 8000df4: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8000df8: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8000dfc: d1ee bne.n 8000ddc } } return HAL_OK; - 8000df2: 2300 movs r3, #0 + 8000dfe: 2300 movs r3, #0 } - 8000df4: 4618 mov r0, r3 - 8000df6: 3708 adds r7, #8 - 8000df8: 46bd mov sp, r7 - 8000dfa: bd80 pop {r7, pc} - 8000dfc: 40023800 .word 0x40023800 - 8000e00: 420e0040 .word 0x420e0040 - 8000e04: 40007000 .word 0x40007000 - 8000e08: 420e0044 .word 0x420e0044 - -08000e0c : + 8000e00: 4618 mov r0, r3 + 8000e02: 3708 adds r7, #8 + 8000e04: 46bd mov sp, r7 + 8000e06: bd80 pop {r7, pc} + 8000e08: 40023800 .word 0x40023800 + 8000e0c: 420e0040 .word 0x420e0040 + 8000e10: 40007000 .word 0x40007000 + 8000e14: 420e0044 .word 0x420e0044 + +08000e18 : * supported by this API. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8000e0c: b580 push {r7, lr} - 8000e0e: b086 sub sp, #24 - 8000e10: af00 add r7, sp, #0 - 8000e12: 6078 str r0, [r7, #4] + 8000e18: b580 push {r7, lr} + 8000e1a: b086 sub sp, #24 + 8000e1c: af00 add r7, sp, #0 + 8000e1e: 6078 str r0, [r7, #4] uint32_t tickstart, pll_config; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) - 8000e14: 687b ldr r3, [r7, #4] - 8000e16: 2b00 cmp r3, #0 - 8000e18: d101 bne.n 8000e1e + 8000e20: 687b ldr r3, [r7, #4] + 8000e22: 2b00 cmp r3, #0 + 8000e24: d101 bne.n 8000e2a { return HAL_ERROR; - 8000e1a: 2301 movs r3, #1 - 8000e1c: e264 b.n 80012e8 + 8000e26: 2301 movs r3, #1 + 8000e28: e267 b.n 80012fa } /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 8000e1e: 687b ldr r3, [r7, #4] - 8000e20: 681b ldr r3, [r3, #0] - 8000e22: f003 0301 and.w r3, r3, #1 - 8000e26: 2b00 cmp r3, #0 - 8000e28: d075 beq.n 8000f16 + 8000e2a: 687b ldr r3, [r7, #4] + 8000e2c: 681b ldr r3, [r3, #0] + 8000e2e: f003 0301 and.w r3, r3, #1 + 8000e32: 2b00 cmp r3, #0 + 8000e34: d075 beq.n 8000f22 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\ - 8000e2a: 4ba3 ldr r3, [pc, #652] ; (80010b8 ) - 8000e2c: 689b ldr r3, [r3, #8] - 8000e2e: f003 030c and.w r3, r3, #12 - 8000e32: 2b04 cmp r3, #4 - 8000e34: d00c beq.n 8000e50 - ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) - 8000e36: 4ba0 ldr r3, [pc, #640] ; (80010b8 ) + 8000e36: 4b88 ldr r3, [pc, #544] ; (8001058 ) 8000e38: 689b ldr r3, [r3, #8] 8000e3a: f003 030c and.w r3, r3, #12 + 8000e3e: 2b04 cmp r3, #4 + 8000e40: d00c beq.n 8000e5c + ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) + 8000e42: 4b85 ldr r3, [pc, #532] ; (8001058 ) + 8000e44: 689b ldr r3, [r3, #8] + 8000e46: f003 030c and.w r3, r3, #12 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\ - 8000e3e: 2b08 cmp r3, #8 - 8000e40: d112 bne.n 8000e68 + 8000e4a: 2b08 cmp r3, #8 + 8000e4c: d112 bne.n 8000e74 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) - 8000e42: 4b9d ldr r3, [pc, #628] ; (80010b8 ) - 8000e44: 685b ldr r3, [r3, #4] - 8000e46: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 8000e4a: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 8000e4e: d10b bne.n 8000e68 + 8000e4e: 4b82 ldr r3, [pc, #520] ; (8001058 ) + 8000e50: 685b ldr r3, [r3, #4] + 8000e52: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 8000e56: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 8000e5a: d10b bne.n 8000e74 { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8000e50: 4b99 ldr r3, [pc, #612] ; (80010b8 ) - 8000e52: 681b ldr r3, [r3, #0] - 8000e54: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8000e58: 2b00 cmp r3, #0 - 8000e5a: d05b beq.n 8000f14 - 8000e5c: 687b ldr r3, [r7, #4] - 8000e5e: 685b ldr r3, [r3, #4] - 8000e60: 2b00 cmp r3, #0 - 8000e62: d157 bne.n 8000f14 + 8000e5c: 4b7e ldr r3, [pc, #504] ; (8001058 ) + 8000e5e: 681b ldr r3, [r3, #0] + 8000e60: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8000e64: 2b00 cmp r3, #0 + 8000e66: d05b beq.n 8000f20 + 8000e68: 687b ldr r3, [r7, #4] + 8000e6a: 685b ldr r3, [r3, #4] + 8000e6c: 2b00 cmp r3, #0 + 8000e6e: d157 bne.n 8000f20 { return HAL_ERROR; - 8000e64: 2301 movs r3, #1 - 8000e66: e23f b.n 80012e8 + 8000e70: 2301 movs r3, #1 + 8000e72: e242 b.n 80012fa } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8000e68: 687b ldr r3, [r7, #4] - 8000e6a: 685b ldr r3, [r3, #4] - 8000e6c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8000e70: d106 bne.n 8000e80 - 8000e72: 4b91 ldr r3, [pc, #580] ; (80010b8 ) - 8000e74: 681b ldr r3, [r3, #0] - 8000e76: 4a90 ldr r2, [pc, #576] ; (80010b8 ) - 8000e78: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 8000e7c: 6013 str r3, [r2, #0] - 8000e7e: e01d b.n 8000ebc - 8000e80: 687b ldr r3, [r7, #4] - 8000e82: 685b ldr r3, [r3, #4] - 8000e84: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 - 8000e88: d10c bne.n 8000ea4 - 8000e8a: 4b8b ldr r3, [pc, #556] ; (80010b8 ) - 8000e8c: 681b ldr r3, [r3, #0] - 8000e8e: 4a8a ldr r2, [pc, #552] ; (80010b8 ) - 8000e90: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 8000e94: 6013 str r3, [r2, #0] - 8000e96: 4b88 ldr r3, [pc, #544] ; (80010b8 ) + 8000e74: 687b ldr r3, [r7, #4] + 8000e76: 685b ldr r3, [r3, #4] + 8000e78: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8000e7c: d106 bne.n 8000e8c + 8000e7e: 4b76 ldr r3, [pc, #472] ; (8001058 ) + 8000e80: 681b ldr r3, [r3, #0] + 8000e82: 4a75 ldr r2, [pc, #468] ; (8001058 ) + 8000e84: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 8000e88: 6013 str r3, [r2, #0] + 8000e8a: e01d b.n 8000ec8 + 8000e8c: 687b ldr r3, [r7, #4] + 8000e8e: 685b ldr r3, [r3, #4] + 8000e90: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 + 8000e94: d10c bne.n 8000eb0 + 8000e96: 4b70 ldr r3, [pc, #448] ; (8001058 ) 8000e98: 681b ldr r3, [r3, #0] - 8000e9a: 4a87 ldr r2, [pc, #540] ; (80010b8 ) - 8000e9c: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 8000e9a: 4a6f ldr r2, [pc, #444] ; (8001058 ) + 8000e9c: f443 2380 orr.w r3, r3, #262144 ; 0x40000 8000ea0: 6013 str r3, [r2, #0] - 8000ea2: e00b b.n 8000ebc - 8000ea4: 4b84 ldr r3, [pc, #528] ; (80010b8 ) - 8000ea6: 681b ldr r3, [r3, #0] - 8000ea8: 4a83 ldr r2, [pc, #524] ; (80010b8 ) - 8000eaa: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8000eae: 6013 str r3, [r2, #0] - 8000eb0: 4b81 ldr r3, [pc, #516] ; (80010b8 ) + 8000ea2: 4b6d ldr r3, [pc, #436] ; (8001058 ) + 8000ea4: 681b ldr r3, [r3, #0] + 8000ea6: 4a6c ldr r2, [pc, #432] ; (8001058 ) + 8000ea8: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 8000eac: 6013 str r3, [r2, #0] + 8000eae: e00b b.n 8000ec8 + 8000eb0: 4b69 ldr r3, [pc, #420] ; (8001058 ) 8000eb2: 681b ldr r3, [r3, #0] - 8000eb4: 4a80 ldr r2, [pc, #512] ; (80010b8 ) - 8000eb6: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 8000eb4: 4a68 ldr r2, [pc, #416] ; (8001058 ) + 8000eb6: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8000eba: 6013 str r3, [r2, #0] + 8000ebc: 4b66 ldr r3, [pc, #408] ; (8001058 ) + 8000ebe: 681b ldr r3, [r3, #0] + 8000ec0: 4a65 ldr r2, [pc, #404] ; (8001058 ) + 8000ec2: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 8000ec6: 6013 str r3, [r2, #0] /* Check the HSE State */ if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF) - 8000ebc: 687b ldr r3, [r7, #4] - 8000ebe: 685b ldr r3, [r3, #4] - 8000ec0: 2b00 cmp r3, #0 - 8000ec2: d013 beq.n 8000eec + 8000ec8: 687b ldr r3, [r7, #4] + 8000eca: 685b ldr r3, [r3, #4] + 8000ecc: 2b00 cmp r3, #0 + 8000ece: d013 beq.n 8000ef8 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000ec4: f7ff fc56 bl 8000774 - 8000ec8: 6138 str r0, [r7, #16] + 8000ed0: f7ff fc56 bl 8000780 + 8000ed4: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8000eca: e008 b.n 8000ede + 8000ed6: e008 b.n 8000eea { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8000ecc: f7ff fc52 bl 8000774 - 8000ed0: 4602 mov r2, r0 - 8000ed2: 693b ldr r3, [r7, #16] - 8000ed4: 1ad3 subs r3, r2, r3 - 8000ed6: 2b64 cmp r3, #100 ; 0x64 - 8000ed8: d901 bls.n 8000ede + 8000ed8: f7ff fc52 bl 8000780 + 8000edc: 4602 mov r2, r0 + 8000ede: 693b ldr r3, [r7, #16] + 8000ee0: 1ad3 subs r3, r2, r3 + 8000ee2: 2b64 cmp r3, #100 ; 0x64 + 8000ee4: d901 bls.n 8000eea { return HAL_TIMEOUT; - 8000eda: 2303 movs r3, #3 - 8000edc: e204 b.n 80012e8 + 8000ee6: 2303 movs r3, #3 + 8000ee8: e207 b.n 80012fa while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8000ede: 4b76 ldr r3, [pc, #472] ; (80010b8 ) - 8000ee0: 681b ldr r3, [r3, #0] - 8000ee2: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8000ee6: 2b00 cmp r3, #0 - 8000ee8: d0f0 beq.n 8000ecc - 8000eea: e014 b.n 8000f16 + 8000eea: 4b5b ldr r3, [pc, #364] ; (8001058 ) + 8000eec: 681b ldr r3, [r3, #0] + 8000eee: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8000ef2: 2b00 cmp r3, #0 + 8000ef4: d0f0 beq.n 8000ed8 + 8000ef6: e014 b.n 8000f22 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000eec: f7ff fc42 bl 8000774 - 8000ef0: 6138 str r0, [r7, #16] + 8000ef8: f7ff fc42 bl 8000780 + 8000efc: 6138 str r0, [r7, #16] /* Wait till HSE is bypassed or disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8000ef2: e008 b.n 8000f06 + 8000efe: e008 b.n 8000f12 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8000ef4: f7ff fc3e bl 8000774 - 8000ef8: 4602 mov r2, r0 - 8000efa: 693b ldr r3, [r7, #16] - 8000efc: 1ad3 subs r3, r2, r3 - 8000efe: 2b64 cmp r3, #100 ; 0x64 - 8000f00: d901 bls.n 8000f06 + 8000f00: f7ff fc3e bl 8000780 + 8000f04: 4602 mov r2, r0 + 8000f06: 693b ldr r3, [r7, #16] + 8000f08: 1ad3 subs r3, r2, r3 + 8000f0a: 2b64 cmp r3, #100 ; 0x64 + 8000f0c: d901 bls.n 8000f12 { return HAL_TIMEOUT; - 8000f02: 2303 movs r3, #3 - 8000f04: e1f0 b.n 80012e8 + 8000f0e: 2303 movs r3, #3 + 8000f10: e1f3 b.n 80012fa while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8000f06: 4b6c ldr r3, [pc, #432] ; (80010b8 ) - 8000f08: 681b ldr r3, [r3, #0] - 8000f0a: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8000f0e: 2b00 cmp r3, #0 - 8000f10: d1f0 bne.n 8000ef4 - 8000f12: e000 b.n 8000f16 + 8000f12: 4b51 ldr r3, [pc, #324] ; (8001058 ) + 8000f14: 681b ldr r3, [r3, #0] + 8000f16: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8000f1a: 2b00 cmp r3, #0 + 8000f1c: d1f0 bne.n 8000f00 + 8000f1e: e000 b.n 8000f22 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8000f14: bf00 nop + 8000f20: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8000f16: 687b ldr r3, [r7, #4] - 8000f18: 681b ldr r3, [r3, #0] - 8000f1a: f003 0302 and.w r3, r3, #2 - 8000f1e: 2b00 cmp r3, #0 - 8000f20: d063 beq.n 8000fea + 8000f22: 687b ldr r3, [r7, #4] + 8000f24: 681b ldr r3, [r3, #0] + 8000f26: f003 0302 and.w r3, r3, #2 + 8000f2a: 2b00 cmp r3, #0 + 8000f2c: d063 beq.n 8000ff6 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\ - 8000f22: 4b65 ldr r3, [pc, #404] ; (80010b8 ) - 8000f24: 689b ldr r3, [r3, #8] - 8000f26: f003 030c and.w r3, r3, #12 - 8000f2a: 2b00 cmp r3, #0 - 8000f2c: d00b beq.n 8000f46 - ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) - 8000f2e: 4b62 ldr r3, [pc, #392] ; (80010b8 ) + 8000f2e: 4b4a ldr r3, [pc, #296] ; (8001058 ) 8000f30: 689b ldr r3, [r3, #8] 8000f32: f003 030c and.w r3, r3, #12 + 8000f36: 2b00 cmp r3, #0 + 8000f38: d00b beq.n 8000f52 + ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) + 8000f3a: 4b47 ldr r3, [pc, #284] ; (8001058 ) + 8000f3c: 689b ldr r3, [r3, #8] + 8000f3e: f003 030c and.w r3, r3, #12 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\ - 8000f36: 2b08 cmp r3, #8 - 8000f38: d11c bne.n 8000f74 + 8000f42: 2b08 cmp r3, #8 + 8000f44: d11c bne.n 8000f80 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) - 8000f3a: 4b5f ldr r3, [pc, #380] ; (80010b8 ) - 8000f3c: 685b ldr r3, [r3, #4] - 8000f3e: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 8000f42: 2b00 cmp r3, #0 - 8000f44: d116 bne.n 8000f74 + 8000f46: 4b44 ldr r3, [pc, #272] ; (8001058 ) + 8000f48: 685b ldr r3, [r3, #4] + 8000f4a: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 8000f4e: 2b00 cmp r3, #0 + 8000f50: d116 bne.n 8000f80 { /* When HSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8000f46: 4b5c ldr r3, [pc, #368] ; (80010b8 ) - 8000f48: 681b ldr r3, [r3, #0] - 8000f4a: f003 0302 and.w r3, r3, #2 - 8000f4e: 2b00 cmp r3, #0 - 8000f50: d005 beq.n 8000f5e - 8000f52: 687b ldr r3, [r7, #4] - 8000f54: 68db ldr r3, [r3, #12] - 8000f56: 2b01 cmp r3, #1 - 8000f58: d001 beq.n 8000f5e + 8000f52: 4b41 ldr r3, [pc, #260] ; (8001058 ) + 8000f54: 681b ldr r3, [r3, #0] + 8000f56: f003 0302 and.w r3, r3, #2 + 8000f5a: 2b00 cmp r3, #0 + 8000f5c: d005 beq.n 8000f6a + 8000f5e: 687b ldr r3, [r7, #4] + 8000f60: 68db ldr r3, [r3, #12] + 8000f62: 2b01 cmp r3, #1 + 8000f64: d001 beq.n 8000f6a { return HAL_ERROR; - 8000f5a: 2301 movs r3, #1 - 8000f5c: e1c4 b.n 80012e8 + 8000f66: 2301 movs r3, #1 + 8000f68: e1c7 b.n 80012fa } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8000f5e: 4b56 ldr r3, [pc, #344] ; (80010b8 ) - 8000f60: 681b ldr r3, [r3, #0] - 8000f62: f023 02f8 bic.w r2, r3, #248 ; 0xf8 - 8000f66: 687b ldr r3, [r7, #4] - 8000f68: 691b ldr r3, [r3, #16] - 8000f6a: 00db lsls r3, r3, #3 - 8000f6c: 4952 ldr r1, [pc, #328] ; (80010b8 ) - 8000f6e: 4313 orrs r3, r2 - 8000f70: 600b str r3, [r1, #0] + 8000f6a: 4b3b ldr r3, [pc, #236] ; (8001058 ) + 8000f6c: 681b ldr r3, [r3, #0] + 8000f6e: f023 02f8 bic.w r2, r3, #248 ; 0xf8 + 8000f72: 687b ldr r3, [r7, #4] + 8000f74: 691b ldr r3, [r3, #16] + 8000f76: 00db lsls r3, r3, #3 + 8000f78: 4937 ldr r1, [pc, #220] ; (8001058 ) + 8000f7a: 4313 orrs r3, r2 + 8000f7c: 600b str r3, [r1, #0] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8000f72: e03a b.n 8000fea + 8000f7e: e03a b.n 8000ff6 } } else { /* Check the HSI State */ if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF) - 8000f74: 687b ldr r3, [r7, #4] - 8000f76: 68db ldr r3, [r3, #12] - 8000f78: 2b00 cmp r3, #0 - 8000f7a: d020 beq.n 8000fbe + 8000f80: 687b ldr r3, [r7, #4] + 8000f82: 68db ldr r3, [r3, #12] + 8000f84: 2b00 cmp r3, #0 + 8000f86: d020 beq.n 8000fca { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); - 8000f7c: 4b4f ldr r3, [pc, #316] ; (80010bc ) - 8000f7e: 2201 movs r2, #1 - 8000f80: 601a str r2, [r3, #0] + 8000f88: 4b34 ldr r3, [pc, #208] ; (800105c ) + 8000f8a: 2201 movs r2, #1 + 8000f8c: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8000f82: f7ff fbf7 bl 8000774 - 8000f86: 6138 str r0, [r7, #16] + 8000f8e: f7ff fbf7 bl 8000780 + 8000f92: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8000f88: e008 b.n 8000f9c + 8000f94: e008 b.n 8000fa8 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 8000f8a: f7ff fbf3 bl 8000774 - 8000f8e: 4602 mov r2, r0 - 8000f90: 693b ldr r3, [r7, #16] - 8000f92: 1ad3 subs r3, r2, r3 - 8000f94: 2b02 cmp r3, #2 - 8000f96: d901 bls.n 8000f9c + 8000f96: f7ff fbf3 bl 8000780 + 8000f9a: 4602 mov r2, r0 + 8000f9c: 693b ldr r3, [r7, #16] + 8000f9e: 1ad3 subs r3, r2, r3 + 8000fa0: 2b02 cmp r3, #2 + 8000fa2: d901 bls.n 8000fa8 { return HAL_TIMEOUT; - 8000f98: 2303 movs r3, #3 - 8000f9a: e1a5 b.n 80012e8 + 8000fa4: 2303 movs r3, #3 + 8000fa6: e1a8 b.n 80012fa while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8000f9c: 4b46 ldr r3, [pc, #280] ; (80010b8 ) - 8000f9e: 681b ldr r3, [r3, #0] - 8000fa0: f003 0302 and.w r3, r3, #2 - 8000fa4: 2b00 cmp r3, #0 - 8000fa6: d0f0 beq.n 8000f8a + 8000fa8: 4b2b ldr r3, [pc, #172] ; (8001058 ) + 8000faa: 681b ldr r3, [r3, #0] + 8000fac: f003 0302 and.w r3, r3, #2 + 8000fb0: 2b00 cmp r3, #0 + 8000fb2: d0f0 beq.n 8000f96 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8000fa8: 4b43 ldr r3, [pc, #268] ; (80010b8 ) - 8000faa: 681b ldr r3, [r3, #0] - 8000fac: f023 02f8 bic.w r2, r3, #248 ; 0xf8 - 8000fb0: 687b ldr r3, [r7, #4] - 8000fb2: 691b ldr r3, [r3, #16] - 8000fb4: 00db lsls r3, r3, #3 - 8000fb6: 4940 ldr r1, [pc, #256] ; (80010b8 ) - 8000fb8: 4313 orrs r3, r2 - 8000fba: 600b str r3, [r1, #0] - 8000fbc: e015 b.n 8000fea + 8000fb4: 4b28 ldr r3, [pc, #160] ; (8001058 ) + 8000fb6: 681b ldr r3, [r3, #0] + 8000fb8: f023 02f8 bic.w r2, r3, #248 ; 0xf8 + 8000fbc: 687b ldr r3, [r7, #4] + 8000fbe: 691b ldr r3, [r3, #16] + 8000fc0: 00db lsls r3, r3, #3 + 8000fc2: 4925 ldr r1, [pc, #148] ; (8001058 ) + 8000fc4: 4313 orrs r3, r2 + 8000fc6: 600b str r3, [r1, #0] + 8000fc8: e015 b.n 8000ff6 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 8000fbe: 4b3f ldr r3, [pc, #252] ; (80010bc ) - 8000fc0: 2200 movs r2, #0 - 8000fc2: 601a str r2, [r3, #0] + 8000fca: 4b24 ldr r3, [pc, #144] ; (800105c ) + 8000fcc: 2200 movs r2, #0 + 8000fce: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8000fc4: f7ff fbd6 bl 8000774 - 8000fc8: 6138 str r0, [r7, #16] + 8000fd0: f7ff fbd6 bl 8000780 + 8000fd4: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 8000fca: e008 b.n 8000fde + 8000fd6: e008 b.n 8000fea { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 8000fcc: f7ff fbd2 bl 8000774 - 8000fd0: 4602 mov r2, r0 - 8000fd2: 693b ldr r3, [r7, #16] - 8000fd4: 1ad3 subs r3, r2, r3 - 8000fd6: 2b02 cmp r3, #2 - 8000fd8: d901 bls.n 8000fde + 8000fd8: f7ff fbd2 bl 8000780 + 8000fdc: 4602 mov r2, r0 + 8000fde: 693b ldr r3, [r7, #16] + 8000fe0: 1ad3 subs r3, r2, r3 + 8000fe2: 2b02 cmp r3, #2 + 8000fe4: d901 bls.n 8000fea { return HAL_TIMEOUT; - 8000fda: 2303 movs r3, #3 - 8000fdc: e184 b.n 80012e8 + 8000fe6: 2303 movs r3, #3 + 8000fe8: e187 b.n 80012fa while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 8000fde: 4b36 ldr r3, [pc, #216] ; (80010b8 ) - 8000fe0: 681b ldr r3, [r3, #0] - 8000fe2: f003 0302 and.w r3, r3, #2 - 8000fe6: 2b00 cmp r3, #0 - 8000fe8: d1f0 bne.n 8000fcc + 8000fea: 4b1b ldr r3, [pc, #108] ; (8001058 ) + 8000fec: 681b ldr r3, [r3, #0] + 8000fee: f003 0302 and.w r3, r3, #2 + 8000ff2: 2b00 cmp r3, #0 + 8000ff4: d1f0 bne.n 8000fd8 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 8000fea: 687b ldr r3, [r7, #4] - 8000fec: 681b ldr r3, [r3, #0] - 8000fee: f003 0308 and.w r3, r3, #8 - 8000ff2: 2b00 cmp r3, #0 - 8000ff4: d030 beq.n 8001058 + 8000ff6: 687b ldr r3, [r7, #4] + 8000ff8: 681b ldr r3, [r3, #0] + 8000ffa: f003 0308 and.w r3, r3, #8 + 8000ffe: 2b00 cmp r3, #0 + 8001000: d036 beq.n 8001070 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF) - 8000ff6: 687b ldr r3, [r7, #4] - 8000ff8: 695b ldr r3, [r3, #20] - 8000ffa: 2b00 cmp r3, #0 - 8000ffc: d016 beq.n 800102c + 8001002: 687b ldr r3, [r7, #4] + 8001004: 695b ldr r3, [r3, #20] + 8001006: 2b00 cmp r3, #0 + 8001008: d016 beq.n 8001038 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 8000ffe: 4b30 ldr r3, [pc, #192] ; (80010c0 ) - 8001000: 2201 movs r2, #1 - 8001002: 601a str r2, [r3, #0] + 800100a: 4b15 ldr r3, [pc, #84] ; (8001060 ) + 800100c: 2201 movs r2, #1 + 800100e: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8001004: f7ff fbb6 bl 8000774 - 8001008: 6138 str r0, [r7, #16] + 8001010: f7ff fbb6 bl 8000780 + 8001014: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 800100a: e008 b.n 800101e + 8001016: e008 b.n 800102a { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 800100c: f7ff fbb2 bl 8000774 - 8001010: 4602 mov r2, r0 - 8001012: 693b ldr r3, [r7, #16] - 8001014: 1ad3 subs r3, r2, r3 - 8001016: 2b02 cmp r3, #2 - 8001018: d901 bls.n 800101e + 8001018: f7ff fbb2 bl 8000780 + 800101c: 4602 mov r2, r0 + 800101e: 693b ldr r3, [r7, #16] + 8001020: 1ad3 subs r3, r2, r3 + 8001022: 2b02 cmp r3, #2 + 8001024: d901 bls.n 800102a { return HAL_TIMEOUT; - 800101a: 2303 movs r3, #3 - 800101c: e164 b.n 80012e8 + 8001026: 2303 movs r3, #3 + 8001028: e167 b.n 80012fa while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 800101e: 4b26 ldr r3, [pc, #152] ; (80010b8 ) - 8001020: 6f5b ldr r3, [r3, #116] ; 0x74 - 8001022: f003 0302 and.w r3, r3, #2 - 8001026: 2b00 cmp r3, #0 - 8001028: d0f0 beq.n 800100c - 800102a: e015 b.n 8001058 + 800102a: 4b0b ldr r3, [pc, #44] ; (8001058 ) + 800102c: 6f5b ldr r3, [r3, #116] ; 0x74 + 800102e: f003 0302 and.w r3, r3, #2 + 8001032: 2b00 cmp r3, #0 + 8001034: d0f0 beq.n 8001018 + 8001036: e01b b.n 8001070 } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 800102c: 4b24 ldr r3, [pc, #144] ; (80010c0 ) - 800102e: 2200 movs r2, #0 - 8001030: 601a str r2, [r3, #0] + 8001038: 4b09 ldr r3, [pc, #36] ; (8001060 ) + 800103a: 2200 movs r2, #0 + 800103c: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001032: f7ff fb9f bl 8000774 - 8001036: 6138 str r0, [r7, #16] + 800103e: f7ff fb9f bl 8000780 + 8001042: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8001038: e008 b.n 800104c + 8001044: e00e b.n 8001064 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 800103a: f7ff fb9b bl 8000774 - 800103e: 4602 mov r2, r0 - 8001040: 693b ldr r3, [r7, #16] - 8001042: 1ad3 subs r3, r2, r3 - 8001044: 2b02 cmp r3, #2 - 8001046: d901 bls.n 800104c + 8001046: f7ff fb9b bl 8000780 + 800104a: 4602 mov r2, r0 + 800104c: 693b ldr r3, [r7, #16] + 800104e: 1ad3 subs r3, r2, r3 + 8001050: 2b02 cmp r3, #2 + 8001052: d907 bls.n 8001064 { return HAL_TIMEOUT; - 8001048: 2303 movs r3, #3 - 800104a: e14d b.n 80012e8 + 8001054: 2303 movs r3, #3 + 8001056: e150 b.n 80012fa + 8001058: 40023800 .word 0x40023800 + 800105c: 42470000 .word 0x42470000 + 8001060: 42470e80 .word 0x42470e80 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 800104c: 4b1a ldr r3, [pc, #104] ; (80010b8 ) - 800104e: 6f5b ldr r3, [r3, #116] ; 0x74 - 8001050: f003 0302 and.w r3, r3, #2 - 8001054: 2b00 cmp r3, #0 - 8001056: d1f0 bne.n 800103a + 8001064: 4b88 ldr r3, [pc, #544] ; (8001288 ) + 8001066: 6f5b ldr r3, [r3, #116] ; 0x74 + 8001068: f003 0302 and.w r3, r3, #2 + 800106c: 2b00 cmp r3, #0 + 800106e: d1ea bne.n 8001046 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 8001058: 687b ldr r3, [r7, #4] - 800105a: 681b ldr r3, [r3, #0] - 800105c: f003 0304 and.w r3, r3, #4 - 8001060: 2b00 cmp r3, #0 - 8001062: f000 80a0 beq.w 80011a6 + 8001070: 687b ldr r3, [r7, #4] + 8001072: 681b ldr r3, [r3, #0] + 8001074: f003 0304 and.w r3, r3, #4 + 8001078: 2b00 cmp r3, #0 + 800107a: f000 8097 beq.w 80011ac { FlagStatus pwrclkchanged = RESET; - 8001066: 2300 movs r3, #0 - 8001068: 75fb strb r3, [r7, #23] + 800107e: 2300 movs r3, #0 + 8001080: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 800106a: 4b13 ldr r3, [pc, #76] ; (80010b8 ) - 800106c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800106e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8001072: 2b00 cmp r3, #0 - 8001074: d10f bne.n 8001096 + 8001082: 4b81 ldr r3, [pc, #516] ; (8001288 ) + 8001084: 6c1b ldr r3, [r3, #64] ; 0x40 + 8001086: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 800108a: 2b00 cmp r3, #0 + 800108c: d10f bne.n 80010ae { __HAL_RCC_PWR_CLK_ENABLE(); - 8001076: 2300 movs r3, #0 - 8001078: 60bb str r3, [r7, #8] - 800107a: 4b0f ldr r3, [pc, #60] ; (80010b8 ) - 800107c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800107e: 4a0e ldr r2, [pc, #56] ; (80010b8 ) - 8001080: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8001084: 6413 str r3, [r2, #64] ; 0x40 - 8001086: 4b0c ldr r3, [pc, #48] ; (80010b8 ) - 8001088: 6c1b ldr r3, [r3, #64] ; 0x40 - 800108a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 800108e: 60bb str r3, [r7, #8] - 8001090: 68bb ldr r3, [r7, #8] + 800108e: 2300 movs r3, #0 + 8001090: 60bb str r3, [r7, #8] + 8001092: 4b7d ldr r3, [pc, #500] ; (8001288 ) + 8001094: 6c1b ldr r3, [r3, #64] ; 0x40 + 8001096: 4a7c ldr r2, [pc, #496] ; (8001288 ) + 8001098: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 800109c: 6413 str r3, [r2, #64] ; 0x40 + 800109e: 4b7a ldr r3, [pc, #488] ; (8001288 ) + 80010a0: 6c1b ldr r3, [r3, #64] ; 0x40 + 80010a2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 80010a6: 60bb str r3, [r7, #8] + 80010a8: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 8001092: 2301 movs r3, #1 - 8001094: 75fb strb r3, [r7, #23] + 80010aa: 2301 movs r3, #1 + 80010ac: 75fb strb r3, [r7, #23] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8001096: 4b0b ldr r3, [pc, #44] ; (80010c4 ) - 8001098: 681b ldr r3, [r3, #0] - 800109a: f403 7380 and.w r3, r3, #256 ; 0x100 - 800109e: 2b00 cmp r3, #0 - 80010a0: d121 bne.n 80010e6 + 80010ae: 4b77 ldr r3, [pc, #476] ; (800128c ) + 80010b0: 681b ldr r3, [r3, #0] + 80010b2: f403 7380 and.w r3, r3, #256 ; 0x100 + 80010b6: 2b00 cmp r3, #0 + 80010b8: d118 bne.n 80010ec { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 80010a2: 4b08 ldr r3, [pc, #32] ; (80010c4 ) - 80010a4: 681b ldr r3, [r3, #0] - 80010a6: 4a07 ldr r2, [pc, #28] ; (80010c4 ) - 80010a8: f443 7380 orr.w r3, r3, #256 ; 0x100 - 80010ac: 6013 str r3, [r2, #0] + 80010ba: 4b74 ldr r3, [pc, #464] ; (800128c ) + 80010bc: 681b ldr r3, [r3, #0] + 80010be: 4a73 ldr r2, [pc, #460] ; (800128c ) + 80010c0: f443 7380 orr.w r3, r3, #256 ; 0x100 + 80010c4: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 80010ae: f7ff fb61 bl 8000774 - 80010b2: 6138 str r0, [r7, #16] + 80010c6: f7ff fb5b bl 8000780 + 80010ca: 6138 str r0, [r7, #16] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80010b4: e011 b.n 80010da - 80010b6: bf00 nop - 80010b8: 40023800 .word 0x40023800 - 80010bc: 42470000 .word 0x42470000 - 80010c0: 42470e80 .word 0x42470e80 - 80010c4: 40007000 .word 0x40007000 + 80010cc: e008 b.n 80010e0 { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 80010c8: f7ff fb54 bl 8000774 - 80010cc: 4602 mov r2, r0 - 80010ce: 693b ldr r3, [r7, #16] - 80010d0: 1ad3 subs r3, r2, r3 - 80010d2: 2b02 cmp r3, #2 - 80010d4: d901 bls.n 80010da + 80010ce: f7ff fb57 bl 8000780 + 80010d2: 4602 mov r2, r0 + 80010d4: 693b ldr r3, [r7, #16] + 80010d6: 1ad3 subs r3, r2, r3 + 80010d8: 2b02 cmp r3, #2 + 80010da: d901 bls.n 80010e0 { return HAL_TIMEOUT; - 80010d6: 2303 movs r3, #3 - 80010d8: e106 b.n 80012e8 + 80010dc: 2303 movs r3, #3 + 80010de: e10c b.n 80012fa while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80010da: 4b85 ldr r3, [pc, #532] ; (80012f0 ) - 80010dc: 681b ldr r3, [r3, #0] - 80010de: f403 7380 and.w r3, r3, #256 ; 0x100 - 80010e2: 2b00 cmp r3, #0 - 80010e4: d0f0 beq.n 80010c8 + 80010e0: 4b6a ldr r3, [pc, #424] ; (800128c ) + 80010e2: 681b ldr r3, [r3, #0] + 80010e4: f403 7380 and.w r3, r3, #256 ; 0x100 + 80010e8: 2b00 cmp r3, #0 + 80010ea: d0f0 beq.n 80010ce } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 80010e6: 687b ldr r3, [r7, #4] - 80010e8: 689b ldr r3, [r3, #8] - 80010ea: 2b01 cmp r3, #1 - 80010ec: d106 bne.n 80010fc - 80010ee: 4b81 ldr r3, [pc, #516] ; (80012f4 ) - 80010f0: 6f1b ldr r3, [r3, #112] ; 0x70 - 80010f2: 4a80 ldr r2, [pc, #512] ; (80012f4 ) - 80010f4: f043 0301 orr.w r3, r3, #1 - 80010f8: 6713 str r3, [r2, #112] ; 0x70 - 80010fa: e01c b.n 8001136 - 80010fc: 687b ldr r3, [r7, #4] - 80010fe: 689b ldr r3, [r3, #8] - 8001100: 2b05 cmp r3, #5 - 8001102: d10c bne.n 800111e - 8001104: 4b7b ldr r3, [pc, #492] ; (80012f4 ) - 8001106: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001108: 4a7a ldr r2, [pc, #488] ; (80012f4 ) - 800110a: f043 0304 orr.w r3, r3, #4 - 800110e: 6713 str r3, [r2, #112] ; 0x70 - 8001110: 4b78 ldr r3, [pc, #480] ; (80012f4 ) - 8001112: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001114: 4a77 ldr r2, [pc, #476] ; (80012f4 ) - 8001116: f043 0301 orr.w r3, r3, #1 - 800111a: 6713 str r3, [r2, #112] ; 0x70 - 800111c: e00b b.n 8001136 - 800111e: 4b75 ldr r3, [pc, #468] ; (80012f4 ) - 8001120: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001122: 4a74 ldr r2, [pc, #464] ; (80012f4 ) - 8001124: f023 0301 bic.w r3, r3, #1 - 8001128: 6713 str r3, [r2, #112] ; 0x70 - 800112a: 4b72 ldr r3, [pc, #456] ; (80012f4 ) - 800112c: 6f1b ldr r3, [r3, #112] ; 0x70 - 800112e: 4a71 ldr r2, [pc, #452] ; (80012f4 ) - 8001130: f023 0304 bic.w r3, r3, #4 - 8001134: 6713 str r3, [r2, #112] ; 0x70 + 80010ec: 687b ldr r3, [r7, #4] + 80010ee: 689b ldr r3, [r3, #8] + 80010f0: 2b01 cmp r3, #1 + 80010f2: d106 bne.n 8001102 + 80010f4: 4b64 ldr r3, [pc, #400] ; (8001288 ) + 80010f6: 6f1b ldr r3, [r3, #112] ; 0x70 + 80010f8: 4a63 ldr r2, [pc, #396] ; (8001288 ) + 80010fa: f043 0301 orr.w r3, r3, #1 + 80010fe: 6713 str r3, [r2, #112] ; 0x70 + 8001100: e01c b.n 800113c + 8001102: 687b ldr r3, [r7, #4] + 8001104: 689b ldr r3, [r3, #8] + 8001106: 2b05 cmp r3, #5 + 8001108: d10c bne.n 8001124 + 800110a: 4b5f ldr r3, [pc, #380] ; (8001288 ) + 800110c: 6f1b ldr r3, [r3, #112] ; 0x70 + 800110e: 4a5e ldr r2, [pc, #376] ; (8001288 ) + 8001110: f043 0304 orr.w r3, r3, #4 + 8001114: 6713 str r3, [r2, #112] ; 0x70 + 8001116: 4b5c ldr r3, [pc, #368] ; (8001288 ) + 8001118: 6f1b ldr r3, [r3, #112] ; 0x70 + 800111a: 4a5b ldr r2, [pc, #364] ; (8001288 ) + 800111c: f043 0301 orr.w r3, r3, #1 + 8001120: 6713 str r3, [r2, #112] ; 0x70 + 8001122: e00b b.n 800113c + 8001124: 4b58 ldr r3, [pc, #352] ; (8001288 ) + 8001126: 6f1b ldr r3, [r3, #112] ; 0x70 + 8001128: 4a57 ldr r2, [pc, #348] ; (8001288 ) + 800112a: f023 0301 bic.w r3, r3, #1 + 800112e: 6713 str r3, [r2, #112] ; 0x70 + 8001130: 4b55 ldr r3, [pc, #340] ; (8001288 ) + 8001132: 6f1b ldr r3, [r3, #112] ; 0x70 + 8001134: 4a54 ldr r2, [pc, #336] ; (8001288 ) + 8001136: f023 0304 bic.w r3, r3, #4 + 800113a: 6713 str r3, [r2, #112] ; 0x70 /* Check the LSE State */ if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) - 8001136: 687b ldr r3, [r7, #4] - 8001138: 689b ldr r3, [r3, #8] - 800113a: 2b00 cmp r3, #0 - 800113c: d015 beq.n 800116a + 800113c: 687b ldr r3, [r7, #4] + 800113e: 689b ldr r3, [r3, #8] + 8001140: 2b00 cmp r3, #0 + 8001142: d015 beq.n 8001170 { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 800113e: f7ff fb19 bl 8000774 - 8001142: 6138 str r0, [r7, #16] + 8001144: f7ff fb1c bl 8000780 + 8001148: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8001144: e00a b.n 800115c + 800114a: e00a b.n 8001162 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8001146: f7ff fb15 bl 8000774 - 800114a: 4602 mov r2, r0 - 800114c: 693b ldr r3, [r7, #16] - 800114e: 1ad3 subs r3, r2, r3 - 8001150: f241 3288 movw r2, #5000 ; 0x1388 - 8001154: 4293 cmp r3, r2 - 8001156: d901 bls.n 800115c + 800114c: f7ff fb18 bl 8000780 + 8001150: 4602 mov r2, r0 + 8001152: 693b ldr r3, [r7, #16] + 8001154: 1ad3 subs r3, r2, r3 + 8001156: f241 3288 movw r2, #5000 ; 0x1388 + 800115a: 4293 cmp r3, r2 + 800115c: d901 bls.n 8001162 { return HAL_TIMEOUT; - 8001158: 2303 movs r3, #3 - 800115a: e0c5 b.n 80012e8 + 800115e: 2303 movs r3, #3 + 8001160: e0cb b.n 80012fa while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 800115c: 4b65 ldr r3, [pc, #404] ; (80012f4 ) - 800115e: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001160: f003 0302 and.w r3, r3, #2 - 8001164: 2b00 cmp r3, #0 - 8001166: d0ee beq.n 8001146 - 8001168: e014 b.n 8001194 + 8001162: 4b49 ldr r3, [pc, #292] ; (8001288 ) + 8001164: 6f1b ldr r3, [r3, #112] ; 0x70 + 8001166: f003 0302 and.w r3, r3, #2 + 800116a: 2b00 cmp r3, #0 + 800116c: d0ee beq.n 800114c + 800116e: e014 b.n 800119a } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 800116a: f7ff fb03 bl 8000774 - 800116e: 6138 str r0, [r7, #16] + 8001170: f7ff fb06 bl 8000780 + 8001174: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8001170: e00a b.n 8001188 + 8001176: e00a b.n 800118e { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8001172: f7ff faff bl 8000774 - 8001176: 4602 mov r2, r0 - 8001178: 693b ldr r3, [r7, #16] - 800117a: 1ad3 subs r3, r2, r3 - 800117c: f241 3288 movw r2, #5000 ; 0x1388 - 8001180: 4293 cmp r3, r2 - 8001182: d901 bls.n 8001188 + 8001178: f7ff fb02 bl 8000780 + 800117c: 4602 mov r2, r0 + 800117e: 693b ldr r3, [r7, #16] + 8001180: 1ad3 subs r3, r2, r3 + 8001182: f241 3288 movw r2, #5000 ; 0x1388 + 8001186: 4293 cmp r3, r2 + 8001188: d901 bls.n 800118e { return HAL_TIMEOUT; - 8001184: 2303 movs r3, #3 - 8001186: e0af b.n 80012e8 + 800118a: 2303 movs r3, #3 + 800118c: e0b5 b.n 80012fa while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8001188: 4b5a ldr r3, [pc, #360] ; (80012f4 ) - 800118a: 6f1b ldr r3, [r3, #112] ; 0x70 - 800118c: f003 0302 and.w r3, r3, #2 - 8001190: 2b00 cmp r3, #0 - 8001192: d1ee bne.n 8001172 + 800118e: 4b3e ldr r3, [pc, #248] ; (8001288 ) + 8001190: 6f1b ldr r3, [r3, #112] ; 0x70 + 8001192: f003 0302 and.w r3, r3, #2 + 8001196: 2b00 cmp r3, #0 + 8001198: d1ee bne.n 8001178 } } } /* Restore clock configuration if changed */ if(pwrclkchanged == SET) - 8001194: 7dfb ldrb r3, [r7, #23] - 8001196: 2b01 cmp r3, #1 - 8001198: d105 bne.n 80011a6 + 800119a: 7dfb ldrb r3, [r7, #23] + 800119c: 2b01 cmp r3, #1 + 800119e: d105 bne.n 80011ac { __HAL_RCC_PWR_CLK_DISABLE(); - 800119a: 4b56 ldr r3, [pc, #344] ; (80012f4 ) - 800119c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800119e: 4a55 ldr r2, [pc, #340] ; (80012f4 ) - 80011a0: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 80011a4: 6413 str r3, [r2, #64] ; 0x40 + 80011a0: 4b39 ldr r3, [pc, #228] ; (8001288 ) + 80011a2: 6c1b ldr r3, [r3, #64] ; 0x40 + 80011a4: 4a38 ldr r2, [pc, #224] ; (8001288 ) + 80011a6: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 + 80011aa: 6413 str r3, [r2, #64] ; 0x40 } } /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 80011a6: 687b ldr r3, [r7, #4] - 80011a8: 699b ldr r3, [r3, #24] - 80011aa: 2b00 cmp r3, #0 - 80011ac: f000 809b beq.w 80012e6 + 80011ac: 687b ldr r3, [r7, #4] + 80011ae: 699b ldr r3, [r3, #24] + 80011b0: 2b00 cmp r3, #0 + 80011b2: f000 80a1 beq.w 80012f8 { /* Check if the PLL is used as system clock or not */ if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) - 80011b0: 4b50 ldr r3, [pc, #320] ; (80012f4 ) - 80011b2: 689b ldr r3, [r3, #8] - 80011b4: f003 030c and.w r3, r3, #12 - 80011b8: 2b08 cmp r3, #8 - 80011ba: d05c beq.n 8001276 + 80011b6: 4b34 ldr r3, [pc, #208] ; (8001288 ) + 80011b8: 689b ldr r3, [r3, #8] + 80011ba: f003 030c and.w r3, r3, #12 + 80011be: 2b08 cmp r3, #8 + 80011c0: d05c beq.n 800127c { if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 80011bc: 687b ldr r3, [r7, #4] - 80011be: 699b ldr r3, [r3, #24] - 80011c0: 2b02 cmp r3, #2 - 80011c2: d141 bne.n 8001248 + 80011c2: 687b ldr r3, [r7, #4] + 80011c4: 699b ldr r3, [r3, #24] + 80011c6: 2b02 cmp r3, #2 + 80011c8: d141 bne.n 800124e assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN)); assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 80011c4: 4b4c ldr r3, [pc, #304] ; (80012f8 ) - 80011c6: 2200 movs r2, #0 - 80011c8: 601a str r2, [r3, #0] + 80011ca: 4b31 ldr r3, [pc, #196] ; (8001290 ) + 80011cc: 2200 movs r2, #0 + 80011ce: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80011ca: f7ff fad3 bl 8000774 - 80011ce: 6138 str r0, [r7, #16] + 80011d0: f7ff fad6 bl 8000780 + 80011d4: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80011d0: e008 b.n 80011e4 + 80011d6: e008 b.n 80011ea { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 80011d2: f7ff facf bl 8000774 - 80011d6: 4602 mov r2, r0 - 80011d8: 693b ldr r3, [r7, #16] - 80011da: 1ad3 subs r3, r2, r3 - 80011dc: 2b02 cmp r3, #2 - 80011de: d901 bls.n 80011e4 + 80011d8: f7ff fad2 bl 8000780 + 80011dc: 4602 mov r2, r0 + 80011de: 693b ldr r3, [r7, #16] + 80011e0: 1ad3 subs r3, r2, r3 + 80011e2: 2b02 cmp r3, #2 + 80011e4: d901 bls.n 80011ea { return HAL_TIMEOUT; - 80011e0: 2303 movs r3, #3 - 80011e2: e081 b.n 80012e8 + 80011e6: 2303 movs r3, #3 + 80011e8: e087 b.n 80012fa while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80011e4: 4b43 ldr r3, [pc, #268] ; (80012f4 ) - 80011e6: 681b ldr r3, [r3, #0] - 80011e8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80011ec: 2b00 cmp r3, #0 - 80011ee: d1f0 bne.n 80011d2 + 80011ea: 4b27 ldr r3, [pc, #156] ; (8001288 ) + 80011ec: 681b ldr r3, [r3, #0] + 80011ee: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80011f2: 2b00 cmp r3, #0 + 80011f4: d1f0 bne.n 80011d8 } } /* Configure the main PLL clock source, multiplication and division factors. */ WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \ - 80011f0: 687b ldr r3, [r7, #4] - 80011f2: 69da ldr r2, [r3, #28] - 80011f4: 687b ldr r3, [r7, #4] - 80011f6: 6a1b ldr r3, [r3, #32] - 80011f8: 431a orrs r2, r3 + 80011f6: 687b ldr r3, [r7, #4] + 80011f8: 69da ldr r2, [r3, #28] 80011fa: 687b ldr r3, [r7, #4] - 80011fc: 6a5b ldr r3, [r3, #36] ; 0x24 - 80011fe: 019b lsls r3, r3, #6 - 8001200: 431a orrs r2, r3 - 8001202: 687b ldr r3, [r7, #4] - 8001204: 6a9b ldr r3, [r3, #40] ; 0x28 - 8001206: 085b lsrs r3, r3, #1 - 8001208: 3b01 subs r3, #1 - 800120a: 041b lsls r3, r3, #16 - 800120c: 431a orrs r2, r3 - 800120e: 687b ldr r3, [r7, #4] - 8001210: 6adb ldr r3, [r3, #44] ; 0x2c - 8001212: 061b lsls r3, r3, #24 - 8001214: 4937 ldr r1, [pc, #220] ; (80012f4 ) - 8001216: 4313 orrs r3, r2 - 8001218: 604b str r3, [r1, #4] + 80011fc: 6a1b ldr r3, [r3, #32] + 80011fe: 431a orrs r2, r3 + 8001200: 687b ldr r3, [r7, #4] + 8001202: 6a5b ldr r3, [r3, #36] ; 0x24 + 8001204: 019b lsls r3, r3, #6 + 8001206: 431a orrs r2, r3 + 8001208: 687b ldr r3, [r7, #4] + 800120a: 6a9b ldr r3, [r3, #40] ; 0x28 + 800120c: 085b lsrs r3, r3, #1 + 800120e: 3b01 subs r3, #1 + 8001210: 041b lsls r3, r3, #16 + 8001212: 431a orrs r2, r3 + 8001214: 687b ldr r3, [r7, #4] + 8001216: 6adb ldr r3, [r3, #44] ; 0x2c + 8001218: 061b lsls r3, r3, #24 + 800121a: 491b ldr r1, [pc, #108] ; (8001288 ) + 800121c: 4313 orrs r3, r2 + 800121e: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLM | \ (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \ (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \ (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 800121a: 4b37 ldr r3, [pc, #220] ; (80012f8 ) - 800121c: 2201 movs r2, #1 - 800121e: 601a str r2, [r3, #0] + 8001220: 4b1b ldr r3, [pc, #108] ; (8001290 ) + 8001222: 2201 movs r2, #1 + 8001224: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001220: f7ff faa8 bl 8000774 - 8001224: 6138 str r0, [r7, #16] + 8001226: f7ff faab bl 8000780 + 800122a: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8001226: e008 b.n 800123a + 800122c: e008 b.n 8001240 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8001228: f7ff faa4 bl 8000774 - 800122c: 4602 mov r2, r0 - 800122e: 693b ldr r3, [r7, #16] - 8001230: 1ad3 subs r3, r2, r3 - 8001232: 2b02 cmp r3, #2 - 8001234: d901 bls.n 800123a + 800122e: f7ff faa7 bl 8000780 + 8001232: 4602 mov r2, r0 + 8001234: 693b ldr r3, [r7, #16] + 8001236: 1ad3 subs r3, r2, r3 + 8001238: 2b02 cmp r3, #2 + 800123a: d901 bls.n 8001240 { return HAL_TIMEOUT; - 8001236: 2303 movs r3, #3 - 8001238: e056 b.n 80012e8 + 800123c: 2303 movs r3, #3 + 800123e: e05c b.n 80012fa while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 800123a: 4b2e ldr r3, [pc, #184] ; (80012f4 ) - 800123c: 681b ldr r3, [r3, #0] - 800123e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8001242: 2b00 cmp r3, #0 - 8001244: d0f0 beq.n 8001228 - 8001246: e04e b.n 80012e6 + 8001240: 4b11 ldr r3, [pc, #68] ; (8001288 ) + 8001242: 681b ldr r3, [r3, #0] + 8001244: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8001248: 2b00 cmp r3, #0 + 800124a: d0f0 beq.n 800122e + 800124c: e054 b.n 80012f8 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8001248: 4b2b ldr r3, [pc, #172] ; (80012f8 ) - 800124a: 2200 movs r2, #0 - 800124c: 601a str r2, [r3, #0] + 800124e: 4b10 ldr r3, [pc, #64] ; (8001290 ) + 8001250: 2200 movs r2, #0 + 8001252: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800124e: f7ff fa91 bl 8000774 - 8001252: 6138 str r0, [r7, #16] + 8001254: f7ff fa94 bl 8000780 + 8001258: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8001254: e008 b.n 8001268 + 800125a: e008 b.n 800126e { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8001256: f7ff fa8d bl 8000774 - 800125a: 4602 mov r2, r0 - 800125c: 693b ldr r3, [r7, #16] - 800125e: 1ad3 subs r3, r2, r3 - 8001260: 2b02 cmp r3, #2 - 8001262: d901 bls.n 8001268 + 800125c: f7ff fa90 bl 8000780 + 8001260: 4602 mov r2, r0 + 8001262: 693b ldr r3, [r7, #16] + 8001264: 1ad3 subs r3, r2, r3 + 8001266: 2b02 cmp r3, #2 + 8001268: d901 bls.n 800126e { return HAL_TIMEOUT; - 8001264: 2303 movs r3, #3 - 8001266: e03f b.n 80012e8 + 800126a: 2303 movs r3, #3 + 800126c: e045 b.n 80012fa while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8001268: 4b22 ldr r3, [pc, #136] ; (80012f4 ) - 800126a: 681b ldr r3, [r3, #0] - 800126c: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8001270: 2b00 cmp r3, #0 - 8001272: d1f0 bne.n 8001256 - 8001274: e037 b.n 80012e6 + 800126e: 4b06 ldr r3, [pc, #24] ; (8001288 ) + 8001270: 681b ldr r3, [r3, #0] + 8001272: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8001276: 2b00 cmp r3, #0 + 8001278: d1f0 bne.n 800125c + 800127a: e03d b.n 80012f8 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 8001276: 687b ldr r3, [r7, #4] - 8001278: 699b ldr r3, [r3, #24] - 800127a: 2b01 cmp r3, #1 - 800127c: d101 bne.n 8001282 + 800127c: 687b ldr r3, [r7, #4] + 800127e: 699b ldr r3, [r3, #24] + 8001280: 2b01 cmp r3, #1 + 8001282: d107 bne.n 8001294 { return HAL_ERROR; - 800127e: 2301 movs r3, #1 - 8001280: e032 b.n 80012e8 + 8001284: 2301 movs r3, #1 + 8001286: e038 b.n 80012fa + 8001288: 40023800 .word 0x40023800 + 800128c: 40007000 .word 0x40007000 + 8001290: 42470060 .word 0x42470060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->PLLCFGR; - 8001282: 4b1c ldr r3, [pc, #112] ; (80012f4 ) - 8001284: 685b ldr r3, [r3, #4] - 8001286: 60fb str r3, [r7, #12] + 8001294: 4b1b ldr r3, [pc, #108] ; (8001304 ) + 8001296: 685b ldr r3, [r3, #4] + 8001298: 60fb str r3, [r7, #12] (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos))) #else if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || - 8001288: 687b ldr r3, [r7, #4] - 800128a: 699b ldr r3, [r3, #24] - 800128c: 2b01 cmp r3, #1 - 800128e: d028 beq.n 80012e2 + 800129a: 687b ldr r3, [r7, #4] + 800129c: 699b ldr r3, [r3, #24] + 800129e: 2b01 cmp r3, #1 + 80012a0: d028 beq.n 80012f4 (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8001290: 68fb ldr r3, [r7, #12] - 8001292: f403 0280 and.w r2, r3, #4194304 ; 0x400000 - 8001296: 687b ldr r3, [r7, #4] - 8001298: 69db ldr r3, [r3, #28] + 80012a2: 68fb ldr r3, [r7, #12] + 80012a4: f403 0280 and.w r2, r3, #4194304 ; 0x400000 + 80012a8: 687b ldr r3, [r7, #4] + 80012aa: 69db ldr r3, [r3, #28] if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || - 800129a: 429a cmp r2, r3 - 800129c: d121 bne.n 80012e2 + 80012ac: 429a cmp r2, r3 + 80012ae: d121 bne.n 80012f4 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || - 800129e: 68fb ldr r3, [r7, #12] - 80012a0: f003 023f and.w r2, r3, #63 ; 0x3f - 80012a4: 687b ldr r3, [r7, #4] - 80012a6: 6a1b ldr r3, [r3, #32] + 80012b0: 68fb ldr r3, [r7, #12] + 80012b2: f003 023f and.w r2, r3, #63 ; 0x3f + 80012b6: 687b ldr r3, [r7, #4] + 80012b8: 6a1b ldr r3, [r3, #32] (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80012a8: 429a cmp r2, r3 - 80012aa: d11a bne.n 80012e2 + 80012ba: 429a cmp r2, r3 + 80012bc: d11a bne.n 80012f4 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || - 80012ac: 68fa ldr r2, [r7, #12] - 80012ae: f647 73c0 movw r3, #32704 ; 0x7fc0 - 80012b2: 4013 ands r3, r2 - 80012b4: 687a ldr r2, [r7, #4] - 80012b6: 6a52 ldr r2, [r2, #36] ; 0x24 - 80012b8: 0192 lsls r2, r2, #6 + 80012be: 68fa ldr r2, [r7, #12] + 80012c0: f647 73c0 movw r3, #32704 ; 0x7fc0 + 80012c4: 4013 ands r3, r2 + 80012c6: 687a ldr r2, [r7, #4] + 80012c8: 6a52 ldr r2, [r2, #36] ; 0x24 + 80012ca: 0192 lsls r2, r2, #6 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || - 80012ba: 4293 cmp r3, r2 - 80012bc: d111 bne.n 80012e2 + 80012cc: 4293 cmp r3, r2 + 80012ce: d111 bne.n 80012f4 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || - 80012be: 68fb ldr r3, [r7, #12] - 80012c0: f403 3240 and.w r2, r3, #196608 ; 0x30000 - 80012c4: 687b ldr r3, [r7, #4] - 80012c6: 6a9b ldr r3, [r3, #40] ; 0x28 - 80012c8: 085b lsrs r3, r3, #1 - 80012ca: 3b01 subs r3, #1 - 80012cc: 041b lsls r3, r3, #16 + 80012d0: 68fb ldr r3, [r7, #12] + 80012d2: f403 3240 and.w r2, r3, #196608 ; 0x30000 + 80012d6: 687b ldr r3, [r7, #4] + 80012d8: 6a9b ldr r3, [r3, #40] ; 0x28 + 80012da: 085b lsrs r3, r3, #1 + 80012dc: 3b01 subs r3, #1 + 80012de: 041b lsls r3, r3, #16 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || - 80012ce: 429a cmp r2, r3 - 80012d0: d107 bne.n 80012e2 + 80012e0: 429a cmp r2, r3 + 80012e2: d107 bne.n 80012f4 (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))) - 80012d2: 68fb ldr r3, [r7, #12] - 80012d4: f003 6270 and.w r2, r3, #251658240 ; 0xf000000 - 80012d8: 687b ldr r3, [r7, #4] - 80012da: 6adb ldr r3, [r3, #44] ; 0x2c - 80012dc: 061b lsls r3, r3, #24 + 80012e4: 68fb ldr r3, [r7, #12] + 80012e6: f003 6270 and.w r2, r3, #251658240 ; 0xf000000 + 80012ea: 687b ldr r3, [r7, #4] + 80012ec: 6adb ldr r3, [r3, #44] ; 0x2c + 80012ee: 061b lsls r3, r3, #24 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || - 80012de: 429a cmp r2, r3 - 80012e0: d001 beq.n 80012e6 + 80012f0: 429a cmp r2, r3 + 80012f2: d001 beq.n 80012f8 #endif { return HAL_ERROR; - 80012e2: 2301 movs r3, #1 - 80012e4: e000 b.n 80012e8 + 80012f4: 2301 movs r3, #1 + 80012f6: e000 b.n 80012fa } } } } return HAL_OK; - 80012e6: 2300 movs r3, #0 + 80012f8: 2300 movs r3, #0 } - 80012e8: 4618 mov r0, r3 - 80012ea: 3718 adds r7, #24 - 80012ec: 46bd mov sp, r7 - 80012ee: bd80 pop {r7, pc} - 80012f0: 40007000 .word 0x40007000 - 80012f4: 40023800 .word 0x40023800 - 80012f8: 42470060 .word 0x42470060 - -080012fc : + 80012fa: 4618 mov r0, r3 + 80012fc: 3718 adds r7, #24 + 80012fe: 46bd mov sp, r7 + 8001300: bd80 pop {r7, pc} + 8001302: bf00 nop + 8001304: 40023800 .word 0x40023800 + +08001308 : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 80012fc: b580 push {r7, lr} - 80012fe: b084 sub sp, #16 - 8001300: af00 add r7, sp, #0 - 8001302: 6078 str r0, [r7, #4] - 8001304: 6039 str r1, [r7, #0] + 8001308: b580 push {r7, lr} + 800130a: b084 sub sp, #16 + 800130c: af00 add r7, sp, #0 + 800130e: 6078 str r0, [r7, #4] + 8001310: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if(RCC_ClkInitStruct == NULL) - 8001306: 687b ldr r3, [r7, #4] - 8001308: 2b00 cmp r3, #0 - 800130a: d101 bne.n 8001310 + 8001312: 687b ldr r3, [r7, #4] + 8001314: 2b00 cmp r3, #0 + 8001316: d101 bne.n 800131c { return HAL_ERROR; - 800130c: 2301 movs r3, #1 - 800130e: e0cc b.n 80014aa + 8001318: 2301 movs r3, #1 + 800131a: e0cc b.n 80014b6 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) - 8001310: 4b68 ldr r3, [pc, #416] ; (80014b4 ) - 8001312: 681b ldr r3, [r3, #0] - 8001314: f003 030f and.w r3, r3, #15 - 8001318: 683a ldr r2, [r7, #0] - 800131a: 429a cmp r2, r3 - 800131c: d90c bls.n 8001338 + 800131c: 4b68 ldr r3, [pc, #416] ; (80014c0 ) + 800131e: 681b ldr r3, [r3, #0] + 8001320: f003 030f and.w r3, r3, #15 + 8001324: 683a ldr r2, [r7, #0] + 8001326: 429a cmp r2, r3 + 8001328: d90c bls.n 8001344 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 800131e: 4b65 ldr r3, [pc, #404] ; (80014b4 ) - 8001320: 683a ldr r2, [r7, #0] - 8001322: b2d2 uxtb r2, r2 - 8001324: 701a strb r2, [r3, #0] + 800132a: 4b65 ldr r3, [pc, #404] ; (80014c0 ) + 800132c: 683a ldr r2, [r7, #0] + 800132e: b2d2 uxtb r2, r2 + 8001330: 701a strb r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 8001326: 4b63 ldr r3, [pc, #396] ; (80014b4 ) - 8001328: 681b ldr r3, [r3, #0] - 800132a: f003 030f and.w r3, r3, #15 - 800132e: 683a ldr r2, [r7, #0] - 8001330: 429a cmp r2, r3 - 8001332: d001 beq.n 8001338 + 8001332: 4b63 ldr r3, [pc, #396] ; (80014c0 ) + 8001334: 681b ldr r3, [r3, #0] + 8001336: f003 030f and.w r3, r3, #15 + 800133a: 683a ldr r2, [r7, #0] + 800133c: 429a cmp r2, r3 + 800133e: d001 beq.n 8001344 { return HAL_ERROR; - 8001334: 2301 movs r3, #1 - 8001336: e0b8 b.n 80014aa + 8001340: 2301 movs r3, #1 + 8001342: e0b8 b.n 80014b6 } } /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8001338: 687b ldr r3, [r7, #4] - 800133a: 681b ldr r3, [r3, #0] - 800133c: f003 0302 and.w r3, r3, #2 - 8001340: 2b00 cmp r3, #0 - 8001342: d020 beq.n 8001386 + 8001344: 687b ldr r3, [r7, #4] + 8001346: 681b ldr r3, [r3, #0] + 8001348: f003 0302 and.w r3, r3, #2 + 800134c: 2b00 cmp r3, #0 + 800134e: d020 beq.n 8001392 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8001344: 687b ldr r3, [r7, #4] - 8001346: 681b ldr r3, [r3, #0] - 8001348: f003 0304 and.w r3, r3, #4 - 800134c: 2b00 cmp r3, #0 - 800134e: d005 beq.n 800135c + 8001350: 687b ldr r3, [r7, #4] + 8001352: 681b ldr r3, [r3, #0] + 8001354: f003 0304 and.w r3, r3, #4 + 8001358: 2b00 cmp r3, #0 + 800135a: d005 beq.n 8001368 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); - 8001350: 4b59 ldr r3, [pc, #356] ; (80014b8 ) - 8001352: 689b ldr r3, [r3, #8] - 8001354: 4a58 ldr r2, [pc, #352] ; (80014b8 ) - 8001356: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00 - 800135a: 6093 str r3, [r2, #8] + 800135c: 4b59 ldr r3, [pc, #356] ; (80014c4 ) + 800135e: 689b ldr r3, [r3, #8] + 8001360: 4a58 ldr r2, [pc, #352] ; (80014c4 ) + 8001362: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00 + 8001366: 6093 str r3, [r2, #8] } if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 800135c: 687b ldr r3, [r7, #4] - 800135e: 681b ldr r3, [r3, #0] - 8001360: f003 0308 and.w r3, r3, #8 - 8001364: 2b00 cmp r3, #0 - 8001366: d005 beq.n 8001374 + 8001368: 687b ldr r3, [r7, #4] + 800136a: 681b ldr r3, [r3, #0] + 800136c: f003 0308 and.w r3, r3, #8 + 8001370: 2b00 cmp r3, #0 + 8001372: d005 beq.n 8001380 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); - 8001368: 4b53 ldr r3, [pc, #332] ; (80014b8 ) - 800136a: 689b ldr r3, [r3, #8] - 800136c: 4a52 ldr r2, [pc, #328] ; (80014b8 ) - 800136e: f443 4360 orr.w r3, r3, #57344 ; 0xe000 - 8001372: 6093 str r3, [r2, #8] + 8001374: 4b53 ldr r3, [pc, #332] ; (80014c4 ) + 8001376: 689b ldr r3, [r3, #8] + 8001378: 4a52 ldr r2, [pc, #328] ; (80014c4 ) + 800137a: f443 4360 orr.w r3, r3, #57344 ; 0xe000 + 800137e: 6093 str r3, [r2, #8] } assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 8001374: 4b50 ldr r3, [pc, #320] ; (80014b8 ) - 8001376: 689b ldr r3, [r3, #8] - 8001378: f023 02f0 bic.w r2, r3, #240 ; 0xf0 - 800137c: 687b ldr r3, [r7, #4] - 800137e: 689b ldr r3, [r3, #8] - 8001380: 494d ldr r1, [pc, #308] ; (80014b8 ) - 8001382: 4313 orrs r3, r2 - 8001384: 608b str r3, [r1, #8] + 8001380: 4b50 ldr r3, [pc, #320] ; (80014c4 ) + 8001382: 689b ldr r3, [r3, #8] + 8001384: f023 02f0 bic.w r2, r3, #240 ; 0xf0 + 8001388: 687b ldr r3, [r7, #4] + 800138a: 689b ldr r3, [r3, #8] + 800138c: 494d ldr r1, [pc, #308] ; (80014c4 ) + 800138e: 4313 orrs r3, r2 + 8001390: 608b str r3, [r1, #8] } /*------------------------- SYSCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 8001386: 687b ldr r3, [r7, #4] - 8001388: 681b ldr r3, [r3, #0] - 800138a: f003 0301 and.w r3, r3, #1 - 800138e: 2b00 cmp r3, #0 - 8001390: d044 beq.n 800141c + 8001392: 687b ldr r3, [r7, #4] + 8001394: 681b ldr r3, [r3, #0] + 8001396: f003 0301 and.w r3, r3, #1 + 800139a: 2b00 cmp r3, #0 + 800139c: d044 beq.n 8001428 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8001392: 687b ldr r3, [r7, #4] - 8001394: 685b ldr r3, [r3, #4] - 8001396: 2b01 cmp r3, #1 - 8001398: d107 bne.n 80013aa + 800139e: 687b ldr r3, [r7, #4] + 80013a0: 685b ldr r3, [r3, #4] + 80013a2: 2b01 cmp r3, #1 + 80013a4: d107 bne.n 80013b6 { /* Check the HSE ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 800139a: 4b47 ldr r3, [pc, #284] ; (80014b8 ) - 800139c: 681b ldr r3, [r3, #0] - 800139e: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 80013a2: 2b00 cmp r3, #0 - 80013a4: d119 bne.n 80013da + 80013a6: 4b47 ldr r3, [pc, #284] ; (80014c4 ) + 80013a8: 681b ldr r3, [r3, #0] + 80013aa: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 80013ae: 2b00 cmp r3, #0 + 80013b0: d119 bne.n 80013e6 { return HAL_ERROR; - 80013a6: 2301 movs r3, #1 - 80013a8: e07f b.n 80014aa + 80013b2: 2301 movs r3, #1 + 80013b4: e07f b.n 80014b6 } } /* PLL is selected as System Clock Source */ else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || - 80013aa: 687b ldr r3, [r7, #4] - 80013ac: 685b ldr r3, [r3, #4] - 80013ae: 2b02 cmp r3, #2 - 80013b0: d003 beq.n 80013ba + 80013b6: 687b ldr r3, [r7, #4] + 80013b8: 685b ldr r3, [r3, #4] + 80013ba: 2b02 cmp r3, #2 + 80013bc: d003 beq.n 80013c6 (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) - 80013b2: 687b ldr r3, [r7, #4] - 80013b4: 685b ldr r3, [r3, #4] + 80013be: 687b ldr r3, [r7, #4] + 80013c0: 685b ldr r3, [r3, #4] else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || - 80013b6: 2b03 cmp r3, #3 - 80013b8: d107 bne.n 80013ca + 80013c2: 2b03 cmp r3, #3 + 80013c4: d107 bne.n 80013d6 { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 80013ba: 4b3f ldr r3, [pc, #252] ; (80014b8 ) - 80013bc: 681b ldr r3, [r3, #0] - 80013be: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80013c2: 2b00 cmp r3, #0 - 80013c4: d109 bne.n 80013da + 80013c6: 4b3f ldr r3, [pc, #252] ; (80014c4 ) + 80013c8: 681b ldr r3, [r3, #0] + 80013ca: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80013ce: 2b00 cmp r3, #0 + 80013d0: d109 bne.n 80013e6 { return HAL_ERROR; - 80013c6: 2301 movs r3, #1 - 80013c8: e06f b.n 80014aa + 80013d2: 2301 movs r3, #1 + 80013d4: e06f b.n 80014b6 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 80013ca: 4b3b ldr r3, [pc, #236] ; (80014b8 ) - 80013cc: 681b ldr r3, [r3, #0] - 80013ce: f003 0302 and.w r3, r3, #2 - 80013d2: 2b00 cmp r3, #0 - 80013d4: d101 bne.n 80013da + 80013d6: 4b3b ldr r3, [pc, #236] ; (80014c4 ) + 80013d8: 681b ldr r3, [r3, #0] + 80013da: f003 0302 and.w r3, r3, #2 + 80013de: 2b00 cmp r3, #0 + 80013e0: d101 bne.n 80013e6 { return HAL_ERROR; - 80013d6: 2301 movs r3, #1 - 80013d8: e067 b.n 80014aa + 80013e2: 2301 movs r3, #1 + 80013e4: e067 b.n 80014b6 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 80013da: 4b37 ldr r3, [pc, #220] ; (80014b8 ) - 80013dc: 689b ldr r3, [r3, #8] - 80013de: f023 0203 bic.w r2, r3, #3 - 80013e2: 687b ldr r3, [r7, #4] - 80013e4: 685b ldr r3, [r3, #4] - 80013e6: 4934 ldr r1, [pc, #208] ; (80014b8 ) - 80013e8: 4313 orrs r3, r2 - 80013ea: 608b str r3, [r1, #8] + 80013e6: 4b37 ldr r3, [pc, #220] ; (80014c4 ) + 80013e8: 689b ldr r3, [r3, #8] + 80013ea: f023 0203 bic.w r2, r3, #3 + 80013ee: 687b ldr r3, [r7, #4] + 80013f0: 685b ldr r3, [r3, #4] + 80013f2: 4934 ldr r1, [pc, #208] ; (80014c4 ) + 80013f4: 4313 orrs r3, r2 + 80013f6: 608b str r3, [r1, #8] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80013ec: f7ff f9c2 bl 8000774 - 80013f0: 60f8 str r0, [r7, #12] + 80013f8: f7ff f9c2 bl 8000780 + 80013fc: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80013f2: e00a b.n 800140a + 80013fe: e00a b.n 8001416 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 80013f4: f7ff f9be bl 8000774 - 80013f8: 4602 mov r2, r0 - 80013fa: 68fb ldr r3, [r7, #12] - 80013fc: 1ad3 subs r3, r2, r3 - 80013fe: f241 3288 movw r2, #5000 ; 0x1388 - 8001402: 4293 cmp r3, r2 - 8001404: d901 bls.n 800140a + 8001400: f7ff f9be bl 8000780 + 8001404: 4602 mov r2, r0 + 8001406: 68fb ldr r3, [r7, #12] + 8001408: 1ad3 subs r3, r2, r3 + 800140a: f241 3288 movw r2, #5000 ; 0x1388 + 800140e: 4293 cmp r3, r2 + 8001410: d901 bls.n 8001416 { return HAL_TIMEOUT; - 8001406: 2303 movs r3, #3 - 8001408: e04f b.n 80014aa + 8001412: 2303 movs r3, #3 + 8001414: e04f b.n 80014b6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 800140a: 4b2b ldr r3, [pc, #172] ; (80014b8 ) - 800140c: 689b ldr r3, [r3, #8] - 800140e: f003 020c and.w r2, r3, #12 - 8001412: 687b ldr r3, [r7, #4] - 8001414: 685b ldr r3, [r3, #4] - 8001416: 009b lsls r3, r3, #2 - 8001418: 429a cmp r2, r3 - 800141a: d1eb bne.n 80013f4 + 8001416: 4b2b ldr r3, [pc, #172] ; (80014c4 ) + 8001418: 689b ldr r3, [r3, #8] + 800141a: f003 020c and.w r2, r3, #12 + 800141e: 687b ldr r3, [r7, #4] + 8001420: 685b ldr r3, [r3, #4] + 8001422: 009b lsls r3, r3, #2 + 8001424: 429a cmp r2, r3 + 8001426: d1eb bne.n 8001400 } } } /* Decreasing the number of wait states because of lower CPU frequency */ if(FLatency < __HAL_FLASH_GET_LATENCY()) - 800141c: 4b25 ldr r3, [pc, #148] ; (80014b4 ) - 800141e: 681b ldr r3, [r3, #0] - 8001420: f003 030f and.w r3, r3, #15 - 8001424: 683a ldr r2, [r7, #0] - 8001426: 429a cmp r2, r3 - 8001428: d20c bcs.n 8001444 + 8001428: 4b25 ldr r3, [pc, #148] ; (80014c0 ) + 800142a: 681b ldr r3, [r3, #0] + 800142c: f003 030f and.w r3, r3, #15 + 8001430: 683a ldr r2, [r7, #0] + 8001432: 429a cmp r2, r3 + 8001434: d20c bcs.n 8001450 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 800142a: 4b22 ldr r3, [pc, #136] ; (80014b4 ) - 800142c: 683a ldr r2, [r7, #0] - 800142e: b2d2 uxtb r2, r2 - 8001430: 701a strb r2, [r3, #0] + 8001436: 4b22 ldr r3, [pc, #136] ; (80014c0 ) + 8001438: 683a ldr r2, [r7, #0] + 800143a: b2d2 uxtb r2, r2 + 800143c: 701a strb r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 8001432: 4b20 ldr r3, [pc, #128] ; (80014b4 ) - 8001434: 681b ldr r3, [r3, #0] - 8001436: f003 030f and.w r3, r3, #15 - 800143a: 683a ldr r2, [r7, #0] - 800143c: 429a cmp r2, r3 - 800143e: d001 beq.n 8001444 + 800143e: 4b20 ldr r3, [pc, #128] ; (80014c0 ) + 8001440: 681b ldr r3, [r3, #0] + 8001442: f003 030f and.w r3, r3, #15 + 8001446: 683a ldr r2, [r7, #0] + 8001448: 429a cmp r2, r3 + 800144a: d001 beq.n 8001450 { return HAL_ERROR; - 8001440: 2301 movs r3, #1 - 8001442: e032 b.n 80014aa + 800144c: 2301 movs r3, #1 + 800144e: e032 b.n 80014b6 } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8001444: 687b ldr r3, [r7, #4] - 8001446: 681b ldr r3, [r3, #0] - 8001448: f003 0304 and.w r3, r3, #4 - 800144c: 2b00 cmp r3, #0 - 800144e: d008 beq.n 8001462 + 8001450: 687b ldr r3, [r7, #4] + 8001452: 681b ldr r3, [r3, #0] + 8001454: f003 0304 and.w r3, r3, #4 + 8001458: 2b00 cmp r3, #0 + 800145a: d008 beq.n 800146e { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 8001450: 4b19 ldr r3, [pc, #100] ; (80014b8 ) - 8001452: 689b ldr r3, [r3, #8] - 8001454: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00 - 8001458: 687b ldr r3, [r7, #4] - 800145a: 68db ldr r3, [r3, #12] - 800145c: 4916 ldr r1, [pc, #88] ; (80014b8 ) - 800145e: 4313 orrs r3, r2 - 8001460: 608b str r3, [r1, #8] + 800145c: 4b19 ldr r3, [pc, #100] ; (80014c4 ) + 800145e: 689b ldr r3, [r3, #8] + 8001460: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00 + 8001464: 687b ldr r3, [r7, #4] + 8001466: 68db ldr r3, [r3, #12] + 8001468: 4916 ldr r1, [pc, #88] ; (80014c4 ) + 800146a: 4313 orrs r3, r2 + 800146c: 608b str r3, [r1, #8] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 8001462: 687b ldr r3, [r7, #4] - 8001464: 681b ldr r3, [r3, #0] - 8001466: f003 0308 and.w r3, r3, #8 - 800146a: 2b00 cmp r3, #0 - 800146c: d009 beq.n 8001482 + 800146e: 687b ldr r3, [r7, #4] + 8001470: 681b ldr r3, [r3, #0] + 8001472: f003 0308 and.w r3, r3, #8 + 8001476: 2b00 cmp r3, #0 + 8001478: d009 beq.n 800148e { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); - 800146e: 4b12 ldr r3, [pc, #72] ; (80014b8 ) - 8001470: 689b ldr r3, [r3, #8] - 8001472: f423 4260 bic.w r2, r3, #57344 ; 0xe000 - 8001476: 687b ldr r3, [r7, #4] - 8001478: 691b ldr r3, [r3, #16] - 800147a: 00db lsls r3, r3, #3 - 800147c: 490e ldr r1, [pc, #56] ; (80014b8 ) - 800147e: 4313 orrs r3, r2 - 8001480: 608b str r3, [r1, #8] + 800147a: 4b12 ldr r3, [pc, #72] ; (80014c4 ) + 800147c: 689b ldr r3, [r3, #8] + 800147e: f423 4260 bic.w r2, r3, #57344 ; 0xe000 + 8001482: 687b ldr r3, [r7, #4] + 8001484: 691b ldr r3, [r3, #16] + 8001486: 00db lsls r3, r3, #3 + 8001488: 490e ldr r1, [pc, #56] ; (80014c4 ) + 800148a: 4313 orrs r3, r2 + 800148c: 608b str r3, [r1, #8] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; - 8001482: f000 f821 bl 80014c8 - 8001486: 4602 mov r2, r0 - 8001488: 4b0b ldr r3, [pc, #44] ; (80014b8 ) - 800148a: 689b ldr r3, [r3, #8] - 800148c: 091b lsrs r3, r3, #4 - 800148e: f003 030f and.w r3, r3, #15 - 8001492: 490a ldr r1, [pc, #40] ; (80014bc ) - 8001494: 5ccb ldrb r3, [r1, r3] - 8001496: fa22 f303 lsr.w r3, r2, r3 - 800149a: 4a09 ldr r2, [pc, #36] ; (80014c0 ) - 800149c: 6013 str r3, [r2, #0] + 800148e: f000 f821 bl 80014d4 + 8001492: 4602 mov r2, r0 + 8001494: 4b0b ldr r3, [pc, #44] ; (80014c4 ) + 8001496: 689b ldr r3, [r3, #8] + 8001498: 091b lsrs r3, r3, #4 + 800149a: f003 030f and.w r3, r3, #15 + 800149e: 490a ldr r1, [pc, #40] ; (80014c8 ) + 80014a0: 5ccb ldrb r3, [r1, r3] + 80014a2: fa22 f303 lsr.w r3, r2, r3 + 80014a6: 4a09 ldr r2, [pc, #36] ; (80014cc ) + 80014a8: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings */ HAL_InitTick (uwTickPrio); - 800149e: 4b09 ldr r3, [pc, #36] ; (80014c4 ) - 80014a0: 681b ldr r3, [r3, #0] - 80014a2: 4618 mov r0, r3 - 80014a4: f7ff f922 bl 80006ec + 80014aa: 4b09 ldr r3, [pc, #36] ; (80014d0 ) + 80014ac: 681b ldr r3, [r3, #0] + 80014ae: 4618 mov r0, r3 + 80014b0: f7ff f922 bl 80006f8 return HAL_OK; - 80014a8: 2300 movs r3, #0 + 80014b4: 2300 movs r3, #0 } - 80014aa: 4618 mov r0, r3 - 80014ac: 3710 adds r7, #16 - 80014ae: 46bd mov sp, r7 - 80014b0: bd80 pop {r7, pc} - 80014b2: bf00 nop - 80014b4: 40023c00 .word 0x40023c00 - 80014b8: 40023800 .word 0x40023800 - 80014bc: 08001894 .word 0x08001894 - 80014c0: 2000000c .word 0x2000000c - 80014c4: 20000010 .word 0x20000010 - -080014c8 : + 80014b6: 4618 mov r0, r3 + 80014b8: 3710 adds r7, #16 + 80014ba: 46bd mov sp, r7 + 80014bc: bd80 pop {r7, pc} + 80014be: bf00 nop + 80014c0: 40023c00 .word 0x40023c00 + 80014c4: 40023800 .word 0x40023800 + 80014c8: 080018e8 .word 0x080018e8 + 80014cc: 2000000c .word 0x2000000c + 80014d0: 20000010 .word 0x20000010 + +080014d4 : * * * @retval SYSCLK frequency */ __weak uint32_t HAL_RCC_GetSysClockFreq(void) { - 80014c8: e92d 43b0 stmdb sp!, {r4, r5, r7, r8, r9, lr} - 80014cc: b084 sub sp, #16 - 80014ce: af00 add r7, sp, #0 + 80014d4: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} + 80014d8: b094 sub sp, #80 ; 0x50 + 80014da: af00 add r7, sp, #0 uint32_t pllm = 0U, pllvco = 0U, pllp = 0U; - 80014d0: 2300 movs r3, #0 - 80014d2: 607b str r3, [r7, #4] - 80014d4: 2300 movs r3, #0 - 80014d6: 60fb str r3, [r7, #12] - 80014d8: 2300 movs r3, #0 - 80014da: 603b str r3, [r7, #0] - uint32_t sysclockfreq = 0U; 80014dc: 2300 movs r3, #0 - 80014de: 60bb str r3, [r7, #8] + 80014de: 647b str r3, [r7, #68] ; 0x44 + 80014e0: 2300 movs r3, #0 + 80014e2: 64fb str r3, [r7, #76] ; 0x4c + 80014e4: 2300 movs r3, #0 + 80014e6: 643b str r3, [r7, #64] ; 0x40 + uint32_t sysclockfreq = 0U; + 80014e8: 2300 movs r3, #0 + 80014ea: 64bb str r3, [r7, #72] ; 0x48 /* Get SYSCLK source -------------------------------------------------------*/ switch (RCC->CFGR & RCC_CFGR_SWS) - 80014e0: 4b67 ldr r3, [pc, #412] ; (8001680 ) - 80014e2: 689b ldr r3, [r3, #8] - 80014e4: f003 030c and.w r3, r3, #12 - 80014e8: 2b08 cmp r3, #8 - 80014ea: d00d beq.n 8001508 - 80014ec: 2b08 cmp r3, #8 - 80014ee: f200 80bd bhi.w 800166c - 80014f2: 2b00 cmp r3, #0 - 80014f4: d002 beq.n 80014fc - 80014f6: 2b04 cmp r3, #4 - 80014f8: d003 beq.n 8001502 - 80014fa: e0b7 b.n 800166c + 80014ec: 4b79 ldr r3, [pc, #484] ; (80016d4 ) + 80014ee: 689b ldr r3, [r3, #8] + 80014f0: f003 030c and.w r3, r3, #12 + 80014f4: 2b08 cmp r3, #8 + 80014f6: d00d beq.n 8001514 + 80014f8: 2b08 cmp r3, #8 + 80014fa: f200 80e1 bhi.w 80016c0 + 80014fe: 2b00 cmp r3, #0 + 8001500: d002 beq.n 8001508 + 8001502: 2b04 cmp r3, #4 + 8001504: d003 beq.n 800150e + 8001506: e0db b.n 80016c0 { case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ { sysclockfreq = HSI_VALUE; - 80014fc: 4b61 ldr r3, [pc, #388] ; (8001684 ) - 80014fe: 60bb str r3, [r7, #8] + 8001508: 4b73 ldr r3, [pc, #460] ; (80016d8 ) + 800150a: 64bb str r3, [r7, #72] ; 0x48 break; - 8001500: e0b7 b.n 8001672 + 800150c: e0db b.n 80016c6 } case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ { sysclockfreq = HSE_VALUE; - 8001502: 4b61 ldr r3, [pc, #388] ; (8001688 ) - 8001504: 60bb str r3, [r7, #8] + 800150e: 4b73 ldr r3, [pc, #460] ; (80016dc ) + 8001510: 64bb str r3, [r7, #72] ; 0x48 break; - 8001506: e0b4 b.n 8001672 + 8001512: e0d8 b.n 80016c6 } case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */ { /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN SYSCLK = PLL_VCO / PLLP */ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; - 8001508: 4b5d ldr r3, [pc, #372] ; (8001680 ) - 800150a: 685b ldr r3, [r3, #4] - 800150c: f003 033f and.w r3, r3, #63 ; 0x3f - 8001510: 607b str r3, [r7, #4] + 8001514: 4b6f ldr r3, [pc, #444] ; (80016d4 ) + 8001516: 685b ldr r3, [r3, #4] + 8001518: f003 033f and.w r3, r3, #63 ; 0x3f + 800151c: 647b str r3, [r7, #68] ; 0x44 if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) - 8001512: 4b5b ldr r3, [pc, #364] ; (8001680 ) - 8001514: 685b ldr r3, [r3, #4] - 8001516: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 800151a: 2b00 cmp r3, #0 - 800151c: d04d beq.n 80015ba + 800151e: 4b6d ldr r3, [pc, #436] ; (80016d4 ) + 8001520: 685b ldr r3, [r3, #4] + 8001522: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 8001526: 2b00 cmp r3, #0 + 8001528: d063 beq.n 80015f2 { /* HSE used as PLL clock source */ pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); - 800151e: 4b58 ldr r3, [pc, #352] ; (8001680 ) - 8001520: 685b ldr r3, [r3, #4] - 8001522: 099b lsrs r3, r3, #6 - 8001524: 461a mov r2, r3 - 8001526: f04f 0300 mov.w r3, #0 - 800152a: f240 10ff movw r0, #511 ; 0x1ff - 800152e: f04f 0100 mov.w r1, #0 - 8001532: ea02 0800 and.w r8, r2, r0 - 8001536: ea03 0901 and.w r9, r3, r1 - 800153a: 4640 mov r0, r8 - 800153c: 4649 mov r1, r9 - 800153e: f04f 0200 mov.w r2, #0 - 8001542: f04f 0300 mov.w r3, #0 - 8001546: 014b lsls r3, r1, #5 - 8001548: ea43 63d0 orr.w r3, r3, r0, lsr #27 - 800154c: 0142 lsls r2, r0, #5 - 800154e: 4610 mov r0, r2 - 8001550: 4619 mov r1, r3 - 8001552: ebb0 0008 subs.w r0, r0, r8 - 8001556: eb61 0109 sbc.w r1, r1, r9 - 800155a: f04f 0200 mov.w r2, #0 - 800155e: f04f 0300 mov.w r3, #0 - 8001562: 018b lsls r3, r1, #6 - 8001564: ea43 6390 orr.w r3, r3, r0, lsr #26 - 8001568: 0182 lsls r2, r0, #6 - 800156a: 1a12 subs r2, r2, r0 - 800156c: eb63 0301 sbc.w r3, r3, r1 - 8001570: f04f 0000 mov.w r0, #0 - 8001574: f04f 0100 mov.w r1, #0 - 8001578: 00d9 lsls r1, r3, #3 - 800157a: ea41 7152 orr.w r1, r1, r2, lsr #29 - 800157e: 00d0 lsls r0, r2, #3 - 8001580: 4602 mov r2, r0 - 8001582: 460b mov r3, r1 - 8001584: eb12 0208 adds.w r2, r2, r8 - 8001588: eb43 0309 adc.w r3, r3, r9 - 800158c: f04f 0000 mov.w r0, #0 - 8001590: f04f 0100 mov.w r1, #0 - 8001594: 0259 lsls r1, r3, #9 - 8001596: ea41 51d2 orr.w r1, r1, r2, lsr #23 - 800159a: 0250 lsls r0, r2, #9 - 800159c: 4602 mov r2, r0 - 800159e: 460b mov r3, r1 - 80015a0: 4610 mov r0, r2 - 80015a2: 4619 mov r1, r3 - 80015a4: 687b ldr r3, [r7, #4] - 80015a6: 461a mov r2, r3 - 80015a8: f04f 0300 mov.w r3, #0 - 80015ac: f7fe fe1e bl 80001ec <__aeabi_uldivmod> - 80015b0: 4602 mov r2, r0 - 80015b2: 460b mov r3, r1 - 80015b4: 4613 mov r3, r2 - 80015b6: 60fb str r3, [r7, #12] - 80015b8: e04a b.n 8001650 + 800152a: 4b6a ldr r3, [pc, #424] ; (80016d4 ) + 800152c: 685b ldr r3, [r3, #4] + 800152e: 099b lsrs r3, r3, #6 + 8001530: 2200 movs r2, #0 + 8001532: 63bb str r3, [r7, #56] ; 0x38 + 8001534: 63fa str r2, [r7, #60] ; 0x3c + 8001536: 6bbb ldr r3, [r7, #56] ; 0x38 + 8001538: f3c3 0308 ubfx r3, r3, #0, #9 + 800153c: 633b str r3, [r7, #48] ; 0x30 + 800153e: 2300 movs r3, #0 + 8001540: 637b str r3, [r7, #52] ; 0x34 + 8001542: e9d7 450c ldrd r4, r5, [r7, #48] ; 0x30 + 8001546: 4622 mov r2, r4 + 8001548: 462b mov r3, r5 + 800154a: f04f 0000 mov.w r0, #0 + 800154e: f04f 0100 mov.w r1, #0 + 8001552: 0159 lsls r1, r3, #5 + 8001554: ea41 61d2 orr.w r1, r1, r2, lsr #27 + 8001558: 0150 lsls r0, r2, #5 + 800155a: 4602 mov r2, r0 + 800155c: 460b mov r3, r1 + 800155e: 4621 mov r1, r4 + 8001560: 1a51 subs r1, r2, r1 + 8001562: 6139 str r1, [r7, #16] + 8001564: 4629 mov r1, r5 + 8001566: eb63 0301 sbc.w r3, r3, r1 + 800156a: 617b str r3, [r7, #20] + 800156c: f04f 0200 mov.w r2, #0 + 8001570: f04f 0300 mov.w r3, #0 + 8001574: e9d7 ab04 ldrd sl, fp, [r7, #16] + 8001578: 4659 mov r1, fp + 800157a: 018b lsls r3, r1, #6 + 800157c: 4651 mov r1, sl + 800157e: ea43 6391 orr.w r3, r3, r1, lsr #26 + 8001582: 4651 mov r1, sl + 8001584: 018a lsls r2, r1, #6 + 8001586: 4651 mov r1, sl + 8001588: ebb2 0801 subs.w r8, r2, r1 + 800158c: 4659 mov r1, fp + 800158e: eb63 0901 sbc.w r9, r3, r1 + 8001592: f04f 0200 mov.w r2, #0 + 8001596: f04f 0300 mov.w r3, #0 + 800159a: ea4f 03c9 mov.w r3, r9, lsl #3 + 800159e: ea43 7358 orr.w r3, r3, r8, lsr #29 + 80015a2: ea4f 02c8 mov.w r2, r8, lsl #3 + 80015a6: 4690 mov r8, r2 + 80015a8: 4699 mov r9, r3 + 80015aa: 4623 mov r3, r4 + 80015ac: eb18 0303 adds.w r3, r8, r3 + 80015b0: 60bb str r3, [r7, #8] + 80015b2: 462b mov r3, r5 + 80015b4: eb49 0303 adc.w r3, r9, r3 + 80015b8: 60fb str r3, [r7, #12] + 80015ba: f04f 0200 mov.w r2, #0 + 80015be: f04f 0300 mov.w r3, #0 + 80015c2: e9d7 4502 ldrd r4, r5, [r7, #8] + 80015c6: 4629 mov r1, r5 + 80015c8: 024b lsls r3, r1, #9 + 80015ca: 4621 mov r1, r4 + 80015cc: ea43 53d1 orr.w r3, r3, r1, lsr #23 + 80015d0: 4621 mov r1, r4 + 80015d2: 024a lsls r2, r1, #9 + 80015d4: 4610 mov r0, r2 + 80015d6: 4619 mov r1, r3 + 80015d8: 6c7b ldr r3, [r7, #68] ; 0x44 + 80015da: 2200 movs r2, #0 + 80015dc: 62bb str r3, [r7, #40] ; 0x28 + 80015de: 62fa str r2, [r7, #44] ; 0x2c + 80015e0: e9d7 230a ldrd r2, r3, [r7, #40] ; 0x28 + 80015e4: f7fe fe02 bl 80001ec <__aeabi_uldivmod> + 80015e8: 4602 mov r2, r0 + 80015ea: 460b mov r3, r1 + 80015ec: 4613 mov r3, r2 + 80015ee: 64fb str r3, [r7, #76] ; 0x4c + 80015f0: e058 b.n 80016a4 } else { /* HSI used as PLL clock source */ pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); - 80015ba: 4b31 ldr r3, [pc, #196] ; (8001680 ) - 80015bc: 685b ldr r3, [r3, #4] - 80015be: 099b lsrs r3, r3, #6 - 80015c0: 461a mov r2, r3 - 80015c2: f04f 0300 mov.w r3, #0 - 80015c6: f240 10ff movw r0, #511 ; 0x1ff - 80015ca: f04f 0100 mov.w r1, #0 - 80015ce: ea02 0400 and.w r4, r2, r0 - 80015d2: ea03 0501 and.w r5, r3, r1 - 80015d6: 4620 mov r0, r4 - 80015d8: 4629 mov r1, r5 - 80015da: f04f 0200 mov.w r2, #0 - 80015de: f04f 0300 mov.w r3, #0 - 80015e2: 014b lsls r3, r1, #5 - 80015e4: ea43 63d0 orr.w r3, r3, r0, lsr #27 - 80015e8: 0142 lsls r2, r0, #5 - 80015ea: 4610 mov r0, r2 - 80015ec: 4619 mov r1, r3 - 80015ee: 1b00 subs r0, r0, r4 - 80015f0: eb61 0105 sbc.w r1, r1, r5 - 80015f4: f04f 0200 mov.w r2, #0 - 80015f8: f04f 0300 mov.w r3, #0 - 80015fc: 018b lsls r3, r1, #6 - 80015fe: ea43 6390 orr.w r3, r3, r0, lsr #26 - 8001602: 0182 lsls r2, r0, #6 - 8001604: 1a12 subs r2, r2, r0 - 8001606: eb63 0301 sbc.w r3, r3, r1 - 800160a: f04f 0000 mov.w r0, #0 - 800160e: f04f 0100 mov.w r1, #0 - 8001612: 00d9 lsls r1, r3, #3 - 8001614: ea41 7152 orr.w r1, r1, r2, lsr #29 - 8001618: 00d0 lsls r0, r2, #3 - 800161a: 4602 mov r2, r0 - 800161c: 460b mov r3, r1 - 800161e: 1912 adds r2, r2, r4 - 8001620: eb45 0303 adc.w r3, r5, r3 - 8001624: f04f 0000 mov.w r0, #0 - 8001628: f04f 0100 mov.w r1, #0 - 800162c: 0299 lsls r1, r3, #10 - 800162e: ea41 5192 orr.w r1, r1, r2, lsr #22 - 8001632: 0290 lsls r0, r2, #10 - 8001634: 4602 mov r2, r0 - 8001636: 460b mov r3, r1 - 8001638: 4610 mov r0, r2 - 800163a: 4619 mov r1, r3 - 800163c: 687b ldr r3, [r7, #4] - 800163e: 461a mov r2, r3 - 8001640: f04f 0300 mov.w r3, #0 - 8001644: f7fe fdd2 bl 80001ec <__aeabi_uldivmod> - 8001648: 4602 mov r2, r0 - 800164a: 460b mov r3, r1 - 800164c: 4613 mov r3, r2 - 800164e: 60fb str r3, [r7, #12] + 80015f2: 4b38 ldr r3, [pc, #224] ; (80016d4 ) + 80015f4: 685b ldr r3, [r3, #4] + 80015f6: 099b lsrs r3, r3, #6 + 80015f8: 2200 movs r2, #0 + 80015fa: 4618 mov r0, r3 + 80015fc: 4611 mov r1, r2 + 80015fe: f3c0 0308 ubfx r3, r0, #0, #9 + 8001602: 623b str r3, [r7, #32] + 8001604: 2300 movs r3, #0 + 8001606: 627b str r3, [r7, #36] ; 0x24 + 8001608: e9d7 8908 ldrd r8, r9, [r7, #32] + 800160c: 4642 mov r2, r8 + 800160e: 464b mov r3, r9 + 8001610: f04f 0000 mov.w r0, #0 + 8001614: f04f 0100 mov.w r1, #0 + 8001618: 0159 lsls r1, r3, #5 + 800161a: ea41 61d2 orr.w r1, r1, r2, lsr #27 + 800161e: 0150 lsls r0, r2, #5 + 8001620: 4602 mov r2, r0 + 8001622: 460b mov r3, r1 + 8001624: 4641 mov r1, r8 + 8001626: ebb2 0a01 subs.w sl, r2, r1 + 800162a: 4649 mov r1, r9 + 800162c: eb63 0b01 sbc.w fp, r3, r1 + 8001630: f04f 0200 mov.w r2, #0 + 8001634: f04f 0300 mov.w r3, #0 + 8001638: ea4f 138b mov.w r3, fp, lsl #6 + 800163c: ea43 639a orr.w r3, r3, sl, lsr #26 + 8001640: ea4f 128a mov.w r2, sl, lsl #6 + 8001644: ebb2 040a subs.w r4, r2, sl + 8001648: eb63 050b sbc.w r5, r3, fp + 800164c: f04f 0200 mov.w r2, #0 + 8001650: f04f 0300 mov.w r3, #0 + 8001654: 00eb lsls r3, r5, #3 + 8001656: ea43 7354 orr.w r3, r3, r4, lsr #29 + 800165a: 00e2 lsls r2, r4, #3 + 800165c: 4614 mov r4, r2 + 800165e: 461d mov r5, r3 + 8001660: 4643 mov r3, r8 + 8001662: 18e3 adds r3, r4, r3 + 8001664: 603b str r3, [r7, #0] + 8001666: 464b mov r3, r9 + 8001668: eb45 0303 adc.w r3, r5, r3 + 800166c: 607b str r3, [r7, #4] + 800166e: f04f 0200 mov.w r2, #0 + 8001672: f04f 0300 mov.w r3, #0 + 8001676: e9d7 4500 ldrd r4, r5, [r7] + 800167a: 4629 mov r1, r5 + 800167c: 028b lsls r3, r1, #10 + 800167e: 4621 mov r1, r4 + 8001680: ea43 5391 orr.w r3, r3, r1, lsr #22 + 8001684: 4621 mov r1, r4 + 8001686: 028a lsls r2, r1, #10 + 8001688: 4610 mov r0, r2 + 800168a: 4619 mov r1, r3 + 800168c: 6c7b ldr r3, [r7, #68] ; 0x44 + 800168e: 2200 movs r2, #0 + 8001690: 61bb str r3, [r7, #24] + 8001692: 61fa str r2, [r7, #28] + 8001694: e9d7 2306 ldrd r2, r3, [r7, #24] + 8001698: f7fe fda8 bl 80001ec <__aeabi_uldivmod> + 800169c: 4602 mov r2, r0 + 800169e: 460b mov r3, r1 + 80016a0: 4613 mov r3, r2 + 80016a2: 64fb str r3, [r7, #76] ; 0x4c } pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U); - 8001650: 4b0b ldr r3, [pc, #44] ; (8001680 ) - 8001652: 685b ldr r3, [r3, #4] - 8001654: 0c1b lsrs r3, r3, #16 - 8001656: f003 0303 and.w r3, r3, #3 - 800165a: 3301 adds r3, #1 - 800165c: 005b lsls r3, r3, #1 - 800165e: 603b str r3, [r7, #0] + 80016a4: 4b0b ldr r3, [pc, #44] ; (80016d4 ) + 80016a6: 685b ldr r3, [r3, #4] + 80016a8: 0c1b lsrs r3, r3, #16 + 80016aa: f003 0303 and.w r3, r3, #3 + 80016ae: 3301 adds r3, #1 + 80016b0: 005b lsls r3, r3, #1 + 80016b2: 643b str r3, [r7, #64] ; 0x40 sysclockfreq = pllvco/pllp; - 8001660: 68fa ldr r2, [r7, #12] - 8001662: 683b ldr r3, [r7, #0] - 8001664: fbb2 f3f3 udiv r3, r2, r3 - 8001668: 60bb str r3, [r7, #8] + 80016b4: 6cfa ldr r2, [r7, #76] ; 0x4c + 80016b6: 6c3b ldr r3, [r7, #64] ; 0x40 + 80016b8: fbb2 f3f3 udiv r3, r2, r3 + 80016bc: 64bb str r3, [r7, #72] ; 0x48 break; - 800166a: e002 b.n 8001672 + 80016be: e002 b.n 80016c6 } default: { sysclockfreq = HSI_VALUE; - 800166c: 4b05 ldr r3, [pc, #20] ; (8001684 ) - 800166e: 60bb str r3, [r7, #8] + 80016c0: 4b05 ldr r3, [pc, #20] ; (80016d8 ) + 80016c2: 64bb str r3, [r7, #72] ; 0x48 break; - 8001670: bf00 nop + 80016c4: bf00 nop } } return sysclockfreq; - 8001672: 68bb ldr r3, [r7, #8] + 80016c6: 6cbb ldr r3, [r7, #72] ; 0x48 } - 8001674: 4618 mov r0, r3 - 8001676: 3710 adds r7, #16 - 8001678: 46bd mov sp, r7 - 800167a: e8bd 83b0 ldmia.w sp!, {r4, r5, r7, r8, r9, pc} - 800167e: bf00 nop - 8001680: 40023800 .word 0x40023800 - 8001684: 00f42400 .word 0x00f42400 - 8001688: 007a1200 .word 0x007a1200 - -0800168c
: + 80016c8: 4618 mov r0, r3 + 80016ca: 3750 adds r7, #80 ; 0x50 + 80016cc: 46bd mov sp, r7 + 80016ce: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} + 80016d2: bf00 nop + 80016d4: 40023800 .word 0x40023800 + 80016d8: 00f42400 .word 0x00f42400 + 80016dc: 007a1200 .word 0x007a1200 + +080016e0
: * @brief Main program * @param None * @retval None */ int main(void) { - 800168c: b580 push {r7, lr} - 800168e: b082 sub sp, #8 - 8001690: af00 add r7, sp, #0 + 80016e0: b580 push {r7, lr} + 80016e2: b082 sub sp, #8 + 80016e4: af00 add r7, sp, #0 duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and handled in milliseconds basis. - Set NVIC Group Priority to 4 - Low Level Initialization */ HAL_Init(); - 8001692: f7ff f80f bl 80006b4 + 80016e6: f7fe ffeb bl 80006c0 /* Configure the system clock to 180 MHz */ SystemClock_Config(); - 8001696: f000 f837 bl 8001708 + 80016ea: f000 f837 bl 800175c /* Initialize BSP Led for LED2 */ BSP_LED_Init(LED1); - 800169a: 2000 movs r0, #0 - 800169c: f7fe ff22 bl 80004e4 + 80016ee: 2000 movs r0, #0 + 80016f0: f7fe fefe bl 80004f0 BSP_LED_Init(LED2); - 80016a0: 2001 movs r0, #1 - 80016a2: f7fe ff1f bl 80004e4 + 80016f4: 2001 movs r0, #1 + 80016f6: f7fe fefb bl 80004f0 BSP_LED_Init(LED3); - 80016a6: 2002 movs r0, #2 - 80016a8: f7fe ff1c bl 80004e4 + 80016fa: 2002 movs r0, #2 + 80016fc: f7fe fef8 bl 80004f0 uint16_t countLED1 = 0; - 80016ac: 2300 movs r3, #0 - 80016ae: 80fb strh r3, [r7, #6] + 8001700: 2300 movs r3, #0 + 8001702: 80fb strh r3, [r7, #6] uint16_t countLED2 = 0; - 80016b0: 2300 movs r3, #0 - 80016b2: 80bb strh r3, [r7, #4] + 8001704: 2300 movs r3, #0 + 8001706: 80bb strh r3, [r7, #4] uint16_t countLED3 = 0; - 80016b4: 2300 movs r3, #0 - 80016b6: 807b strh r3, [r7, #2] + 8001708: 2300 movs r3, #0 + 800170a: 807b strh r3, [r7, #2] /* Infinite loop */ while (1) { if (countLED1 == COUNT_LED1) { - 80016b8: 88fb ldrh r3, [r7, #6] - 80016ba: 2b64 cmp r3, #100 ; 0x64 - 80016bc: d104 bne.n 80016c8 + 800170c: 88fb ldrh r3, [r7, #6] + 800170e: 2b64 cmp r3, #100 ; 0x64 + 8001710: d104 bne.n 800171c BSP_LED_Toggle(LED1); - 80016be: 2000 movs r0, #0 - 80016c0: f7fe ff7a bl 80005b8 + 8001712: 2000 movs r0, #0 + 8001714: f7fe ff56 bl 80005c4 countLED1 = 0; - 80016c4: 2300 movs r3, #0 - 80016c6: 80fb strh r3, [r7, #6] + 8001718: 2300 movs r3, #0 + 800171a: 80fb strh r3, [r7, #6] } if (countLED2 >= COUNT_LED2) { - 80016c8: 88bb ldrh r3, [r7, #4] - 80016ca: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 - 80016ce: d304 bcc.n 80016da + 800171c: 88bb ldrh r3, [r7, #4] + 800171e: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 + 8001722: d304 bcc.n 800172e BSP_LED_Toggle(LED2); - 80016d0: 2001 movs r0, #1 - 80016d2: f7fe ff71 bl 80005b8 + 8001724: 2001 movs r0, #1 + 8001726: f7fe ff4d bl 80005c4 countLED2 = 0; - 80016d6: 2300 movs r3, #0 - 80016d8: 80bb strh r3, [r7, #4] + 800172a: 2300 movs r3, #0 + 800172c: 80bb strh r3, [r7, #4] } if (COUNT_LED3 == countLED3) { - 80016da: 887b ldrh r3, [r7, #2] - 80016dc: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 - 80016e0: d104 bne.n 80016ec + 800172e: 887b ldrh r3, [r7, #2] + 8001730: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 + 8001734: d104 bne.n 8001740 BSP_LED_Toggle(LED3); - 80016e2: 2002 movs r0, #2 - 80016e4: f7fe ff68 bl 80005b8 + 8001736: 2002 movs r0, #2 + 8001738: f7fe ff44 bl 80005c4 countLED3 = 0; - 80016e8: 2300 movs r3, #0 - 80016ea: 807b strh r3, [r7, #2] + 800173c: 2300 movs r3, #0 + 800173e: 807b strh r3, [r7, #2] } countLED1++; - 80016ec: 88fb ldrh r3, [r7, #6] - 80016ee: 3301 adds r3, #1 - 80016f0: 80fb strh r3, [r7, #6] + 8001740: 88fb ldrh r3, [r7, #6] + 8001742: 3301 adds r3, #1 + 8001744: 80fb strh r3, [r7, #6] countLED2++; - 80016f2: 88bb ldrh r3, [r7, #4] - 80016f4: 3301 adds r3, #1 - 80016f6: 80bb strh r3, [r7, #4] + 8001746: 88bb ldrh r3, [r7, #4] + 8001748: 3301 adds r3, #1 + 800174a: 80bb strh r3, [r7, #4] countLED3++; - 80016f8: 887b ldrh r3, [r7, #2] - 80016fa: 3301 adds r3, #1 - 80016fc: 807b strh r3, [r7, #2] + 800174c: 887b ldrh r3, [r7, #2] + 800174e: 3301 adds r3, #1 + 8001750: 807b strh r3, [r7, #2] HAL_Delay(1); - 80016fe: 2001 movs r0, #1 - 8001700: f7ff f844 bl 800078c + 8001752: 2001 movs r0, #1 + 8001754: f7ff f820 bl 8000798 if (countLED1 == COUNT_LED1) { - 8001704: e7d8 b.n 80016b8 + 8001758: e7d8 b.n 800170c ... -08001708 : +0800175c : * Flash Latency(WS) = 5 * @param None * @retval None */ static void SystemClock_Config(void) { - 8001708: b580 push {r7, lr} - 800170a: b094 sub sp, #80 ; 0x50 - 800170c: af00 add r7, sp, #0 + 800175c: b580 push {r7, lr} + 800175e: b094 sub sp, #80 ; 0x50 + 8001760: af00 add r7, sp, #0 RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; /* Enable Power Control clock */ __HAL_RCC_PWR_CLK_ENABLE(); - 800170e: 2300 movs r3, #0 - 8001710: 60bb str r3, [r7, #8] - 8001712: 4b2c ldr r3, [pc, #176] ; (80017c4 ) - 8001714: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001716: 4a2b ldr r2, [pc, #172] ; (80017c4 ) - 8001718: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 800171c: 6413 str r3, [r2, #64] ; 0x40 - 800171e: 4b29 ldr r3, [pc, #164] ; (80017c4 ) - 8001720: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001722: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8001726: 60bb str r3, [r7, #8] - 8001728: 68bb ldr r3, [r7, #8] + 8001762: 2300 movs r3, #0 + 8001764: 60bb str r3, [r7, #8] + 8001766: 4b2c ldr r3, [pc, #176] ; (8001818 ) + 8001768: 6c1b ldr r3, [r3, #64] ; 0x40 + 800176a: 4a2b ldr r2, [pc, #172] ; (8001818 ) + 800176c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 8001770: 6413 str r3, [r2, #64] ; 0x40 + 8001772: 4b29 ldr r3, [pc, #164] ; (8001818 ) + 8001774: 6c1b ldr r3, [r3, #64] ; 0x40 + 8001776: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 800177a: 60bb str r3, [r7, #8] + 800177c: 68bb ldr r3, [r7, #8] /* The voltage scaling allows optimizing the power consumption when the device is clocked below the maximum system frequency, to update the voltage scaling value regarding system frequency refer to product datasheet. */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 800172a: 2300 movs r3, #0 - 800172c: 607b str r3, [r7, #4] - 800172e: 4b26 ldr r3, [pc, #152] ; (80017c8 ) - 8001730: 681b ldr r3, [r3, #0] - 8001732: 4a25 ldr r2, [pc, #148] ; (80017c8 ) - 8001734: f443 4340 orr.w r3, r3, #49152 ; 0xc000 - 8001738: 6013 str r3, [r2, #0] - 800173a: 4b23 ldr r3, [pc, #140] ; (80017c8 ) - 800173c: 681b ldr r3, [r3, #0] - 800173e: f403 4340 and.w r3, r3, #49152 ; 0xc000 - 8001742: 607b str r3, [r7, #4] - 8001744: 687b ldr r3, [r7, #4] + 800177e: 2300 movs r3, #0 + 8001780: 607b str r3, [r7, #4] + 8001782: 4b26 ldr r3, [pc, #152] ; (800181c ) + 8001784: 681b ldr r3, [r3, #0] + 8001786: 4a25 ldr r2, [pc, #148] ; (800181c ) + 8001788: f443 4340 orr.w r3, r3, #49152 ; 0xc000 + 800178c: 6013 str r3, [r2, #0] + 800178e: 4b23 ldr r3, [pc, #140] ; (800181c ) + 8001790: 681b ldr r3, [r3, #0] + 8001792: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 8001796: 607b str r3, [r7, #4] + 8001798: 687b ldr r3, [r7, #4] /* Enable HSE Oscillator and activate PLL with HSE as source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 8001746: 2301 movs r3, #1 - 8001748: 60fb str r3, [r7, #12] + 800179a: 2301 movs r3, #1 + 800179c: 60fb str r3, [r7, #12] RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; - 800174a: f44f 23a0 mov.w r3, #327680 ; 0x50000 - 800174e: 613b str r3, [r7, #16] + 800179e: f44f 23a0 mov.w r3, #327680 ; 0x50000 + 80017a2: 613b str r3, [r7, #16] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 8001750: 2302 movs r3, #2 - 8001752: 627b str r3, [r7, #36] ; 0x24 + 80017a4: 2302 movs r3, #2 + 80017a6: 627b str r3, [r7, #36] ; 0x24 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 8001754: f44f 0380 mov.w r3, #4194304 ; 0x400000 - 8001758: 62bb str r3, [r7, #40] ; 0x28 + 80017a8: f44f 0380 mov.w r3, #4194304 ; 0x400000 + 80017ac: 62bb str r3, [r7, #40] ; 0x28 RCC_OscInitStruct.PLL.PLLM = 8; - 800175a: 2308 movs r3, #8 - 800175c: 62fb str r3, [r7, #44] ; 0x2c + 80017ae: 2308 movs r3, #8 + 80017b0: 62fb str r3, [r7, #44] ; 0x2c RCC_OscInitStruct.PLL.PLLN = 360; - 800175e: f44f 73b4 mov.w r3, #360 ; 0x168 - 8001762: 633b str r3, [r7, #48] ; 0x30 + 80017b2: f44f 73b4 mov.w r3, #360 ; 0x168 + 80017b6: 633b str r3, [r7, #48] ; 0x30 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 8001764: 2302 movs r3, #2 - 8001766: 637b str r3, [r7, #52] ; 0x34 + 80017b8: 2302 movs r3, #2 + 80017ba: 637b str r3, [r7, #52] ; 0x34 RCC_OscInitStruct.PLL.PLLQ = 7; - 8001768: 2307 movs r3, #7 - 800176a: 63bb str r3, [r7, #56] ; 0x38 + 80017bc: 2307 movs r3, #7 + 80017be: 63bb str r3, [r7, #56] ; 0x38 if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 800176c: f107 030c add.w r3, r7, #12 - 8001770: 4618 mov r0, r3 - 8001772: f7ff fb4b bl 8000e0c - 8001776: 4603 mov r3, r0 - 8001778: 2b00 cmp r3, #0 - 800177a: d001 beq.n 8001780 + 80017c0: f107 030c add.w r3, r7, #12 + 80017c4: 4618 mov r0, r3 + 80017c6: f7ff fb27 bl 8000e18 + 80017ca: 4603 mov r3, r0 + 80017cc: 2b00 cmp r3, #0 + 80017ce: d001 beq.n 80017d4 { /* Initialization Error */ Error_Handler(); - 800177c: f000 f826 bl 80017cc + 80017d0: f000 f826 bl 8001820 } if(HAL_PWREx_EnableOverDrive() != HAL_OK) - 8001780: f7ff faf4 bl 8000d6c - 8001784: 4603 mov r3, r0 - 8001786: 2b00 cmp r3, #0 - 8001788: d001 beq.n 800178e + 80017d4: f7ff fad0 bl 8000d78 + 80017d8: 4603 mov r3, r0 + 80017da: 2b00 cmp r3, #0 + 80017dc: d001 beq.n 80017e2 { /* Initialization Error */ Error_Handler(); - 800178a: f000 f81f bl 80017cc + 80017de: f000 f81f bl 8001820 } /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); - 800178e: 230f movs r3, #15 - 8001790: 63fb str r3, [r7, #60] ; 0x3c + 80017e2: 230f movs r3, #15 + 80017e4: 63fb str r3, [r7, #60] ; 0x3c RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 8001792: 2302 movs r3, #2 - 8001794: 643b str r3, [r7, #64] ; 0x40 + 80017e6: 2302 movs r3, #2 + 80017e8: 643b str r3, [r7, #64] ; 0x40 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8001796: 2300 movs r3, #0 - 8001798: 647b str r3, [r7, #68] ; 0x44 + 80017ea: 2300 movs r3, #0 + 80017ec: 647b str r3, [r7, #68] ; 0x44 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 800179a: f44f 53a0 mov.w r3, #5120 ; 0x1400 - 800179e: 64bb str r3, [r7, #72] ; 0x48 + 80017ee: f44f 53a0 mov.w r3, #5120 ; 0x1400 + 80017f2: 64bb str r3, [r7, #72] ; 0x48 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 80017a0: f44f 5380 mov.w r3, #4096 ; 0x1000 - 80017a4: 64fb str r3, [r7, #76] ; 0x4c + 80017f4: f44f 5380 mov.w r3, #4096 ; 0x1000 + 80017f8: 64fb str r3, [r7, #76] ; 0x4c if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) - 80017a6: f107 033c add.w r3, r7, #60 ; 0x3c - 80017aa: 2105 movs r1, #5 - 80017ac: 4618 mov r0, r3 - 80017ae: f7ff fda5 bl 80012fc - 80017b2: 4603 mov r3, r0 - 80017b4: 2b00 cmp r3, #0 - 80017b6: d001 beq.n 80017bc + 80017fa: f107 033c add.w r3, r7, #60 ; 0x3c + 80017fe: 2105 movs r1, #5 + 8001800: 4618 mov r0, r3 + 8001802: f7ff fd81 bl 8001308 + 8001806: 4603 mov r3, r0 + 8001808: 2b00 cmp r3, #0 + 800180a: d001 beq.n 8001810 { /* Initialization Error */ Error_Handler(); - 80017b8: f000 f808 bl 80017cc + 800180c: f000 f808 bl 8001820 } } - 80017bc: bf00 nop - 80017be: 3750 adds r7, #80 ; 0x50 - 80017c0: 46bd mov sp, r7 - 80017c2: bd80 pop {r7, pc} - 80017c4: 40023800 .word 0x40023800 - 80017c8: 40007000 .word 0x40007000 - -080017cc : + 8001810: bf00 nop + 8001812: 3750 adds r7, #80 ; 0x50 + 8001814: 46bd mov sp, r7 + 8001816: bd80 pop {r7, pc} + 8001818: 40023800 .word 0x40023800 + 800181c: 40007000 .word 0x40007000 + +08001820 : * @brief This function is executed in case of error occurrence. * @param None * @retval None */ static void Error_Handler(void) { - 80017cc: b580 push {r7, lr} - 80017ce: af00 add r7, sp, #0 + 8001820: b580 push {r7, lr} + 8001822: af00 add r7, sp, #0 /* Turn LED2 on */ BSP_LED_On(LED2); - 80017d0: 2001 movs r0, #1 - 80017d2: f7fe fed7 bl 8000584 + 8001824: 2001 movs r0, #1 + 8001826: f7fe feb3 bl 8000590 while (1) - 80017d6: e7fe b.n 80017d6 + 800182a: e7fe b.n 800182a -080017d8 : +0800182c : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* set stack pointer */ - 80017d8: f8df d034 ldr.w sp, [pc, #52] ; 8001810 + 800182c: f8df d034 ldr.w sp, [pc, #52] ; 8001864 /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 - 80017dc: 2100 movs r1, #0 + 8001830: 2100 movs r1, #0 b LoopCopyDataInit - 80017de: e003 b.n 80017e8 + 8001832: e003 b.n 800183c -080017e0 : +08001834 : CopyDataInit: ldr r3, =_sidata - 80017e0: 4b0c ldr r3, [pc, #48] ; (8001814 ) + 8001834: 4b0c ldr r3, [pc, #48] ; (8001868 ) ldr r3, [r3, r1] - 80017e2: 585b ldr r3, [r3, r1] + 8001836: 585b ldr r3, [r3, r1] str r3, [r0, r1] - 80017e4: 5043 str r3, [r0, r1] + 8001838: 5043 str r3, [r0, r1] adds r1, r1, #4 - 80017e6: 3104 adds r1, #4 + 800183a: 3104 adds r1, #4 -080017e8 : +0800183c : LoopCopyDataInit: ldr r0, =_sdata - 80017e8: 480b ldr r0, [pc, #44] ; (8001818 ) + 800183c: 480b ldr r0, [pc, #44] ; (800186c ) ldr r3, =_edata - 80017ea: 4b0c ldr r3, [pc, #48] ; (800181c ) + 800183e: 4b0c ldr r3, [pc, #48] ; (8001870 ) adds r2, r0, r1 - 80017ec: 1842 adds r2, r0, r1 + 8001840: 1842 adds r2, r0, r1 cmp r2, r3 - 80017ee: 429a cmp r2, r3 + 8001842: 429a cmp r2, r3 bcc CopyDataInit - 80017f0: d3f6 bcc.n 80017e0 + 8001844: d3f6 bcc.n 8001834 ldr r2, =_sbss - 80017f2: 4a0b ldr r2, [pc, #44] ; (8001820 ) + 8001846: 4a0b ldr r2, [pc, #44] ; (8001874 ) b LoopFillZerobss - 80017f4: e002 b.n 80017fc + 8001848: e002 b.n 8001850 -080017f6 : +0800184a : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 - 80017f6: 2300 movs r3, #0 + 800184a: 2300 movs r3, #0 str r3, [r2], #4 - 80017f8: f842 3b04 str.w r3, [r2], #4 + 800184c: f842 3b04 str.w r3, [r2], #4 -080017fc : +08001850 : LoopFillZerobss: ldr r3, = _ebss - 80017fc: 4b09 ldr r3, [pc, #36] ; (8001824 ) + 8001850: 4b09 ldr r3, [pc, #36] ; (8001878 ) cmp r2, r3 - 80017fe: 429a cmp r2, r3 + 8001852: 429a cmp r2, r3 bcc FillZerobss - 8001800: d3f9 bcc.n 80017f6 + 8001854: d3f9 bcc.n 800184a /* Call the clock system intitialization function.*/ bl SystemInit - 8001802: f7fe fef3 bl 80005ec + 8001856: f7fe fecf bl 80005f8 /* Call static constructors */ bl __libc_init_array - 8001806: f000 f811 bl 800182c <__libc_init_array> + 800185a: f000 f811 bl 8001880 <__libc_init_array> /* Call the application's entry point.*/ bl main - 800180a: f7ff ff3f bl 800168c
+ 800185e: f7ff ff3f bl 80016e0
bx lr - 800180e: 4770 bx lr + 8001862: 4770 bx lr ldr sp, =_estack /* set stack pointer */ - 8001810: 20030000 .word 0x20030000 + 8001864: 20030000 .word 0x20030000 ldr r3, =_sidata - 8001814: 080018b4 .word 0x080018b4 + 8001868: 08001908 .word 0x08001908 ldr r0, =_sdata - 8001818: 20000000 .word 0x20000000 + 800186c: 20000000 .word 0x20000000 ldr r3, =_edata - 800181c: 20000018 .word 0x20000018 + 8001870: 20000018 .word 0x20000018 ldr r2, =_sbss - 8001820: 20000018 .word 0x20000018 + 8001874: 20000018 .word 0x20000018 ldr r3, = _ebss - 8001824: 20000038 .word 0x20000038 + 8001878: 20000038 .word 0x20000038 -08001828 : +0800187c : * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 8001828: e7fe b.n 8001828 + 800187c: e7fe b.n 800187c ... -0800182c <__libc_init_array>: - 800182c: b570 push {r4, r5, r6, lr} - 800182e: 4d0d ldr r5, [pc, #52] ; (8001864 <__libc_init_array+0x38>) - 8001830: 4c0d ldr r4, [pc, #52] ; (8001868 <__libc_init_array+0x3c>) - 8001832: 1b64 subs r4, r4, r5 - 8001834: 10a4 asrs r4, r4, #2 - 8001836: 2600 movs r6, #0 - 8001838: 42a6 cmp r6, r4 - 800183a: d109 bne.n 8001850 <__libc_init_array+0x24> - 800183c: 4d0b ldr r5, [pc, #44] ; (800186c <__libc_init_array+0x40>) - 800183e: 4c0c ldr r4, [pc, #48] ; (8001870 <__libc_init_array+0x44>) - 8001840: f000 f818 bl 8001874 <_init> - 8001844: 1b64 subs r4, r4, r5 - 8001846: 10a4 asrs r4, r4, #2 - 8001848: 2600 movs r6, #0 - 800184a: 42a6 cmp r6, r4 - 800184c: d105 bne.n 800185a <__libc_init_array+0x2e> - 800184e: bd70 pop {r4, r5, r6, pc} - 8001850: f855 3b04 ldr.w r3, [r5], #4 - 8001854: 4798 blx r3 - 8001856: 3601 adds r6, #1 - 8001858: e7ee b.n 8001838 <__libc_init_array+0xc> - 800185a: f855 3b04 ldr.w r3, [r5], #4 - 800185e: 4798 blx r3 - 8001860: 3601 adds r6, #1 - 8001862: e7f2 b.n 800184a <__libc_init_array+0x1e> - 8001864: 080018ac .word 0x080018ac - 8001868: 080018ac .word 0x080018ac - 800186c: 080018ac .word 0x080018ac - 8001870: 080018b0 .word 0x080018b0 - -08001874 <_init>: - 8001874: b5f8 push {r3, r4, r5, r6, r7, lr} - 8001876: bf00 nop - 8001878: bcf8 pop {r3, r4, r5, r6, r7} - 800187a: bc08 pop {r3} - 800187c: 469e mov lr, r3 - 800187e: 4770 bx lr - -08001880 <_fini>: - 8001880: b5f8 push {r3, r4, r5, r6, r7, lr} - 8001882: bf00 nop - 8001884: bcf8 pop {r3, r4, r5, r6, r7} - 8001886: bc08 pop {r3} - 8001888: 469e mov lr, r3 - 800188a: 4770 bx lr +08001880 <__libc_init_array>: + 8001880: b570 push {r4, r5, r6, lr} + 8001882: 4d0d ldr r5, [pc, #52] ; (80018b8 <__libc_init_array+0x38>) + 8001884: 4c0d ldr r4, [pc, #52] ; (80018bc <__libc_init_array+0x3c>) + 8001886: 1b64 subs r4, r4, r5 + 8001888: 10a4 asrs r4, r4, #2 + 800188a: 2600 movs r6, #0 + 800188c: 42a6 cmp r6, r4 + 800188e: d109 bne.n 80018a4 <__libc_init_array+0x24> + 8001890: 4d0b ldr r5, [pc, #44] ; (80018c0 <__libc_init_array+0x40>) + 8001892: 4c0c ldr r4, [pc, #48] ; (80018c4 <__libc_init_array+0x44>) + 8001894: f000 f818 bl 80018c8 <_init> + 8001898: 1b64 subs r4, r4, r5 + 800189a: 10a4 asrs r4, r4, #2 + 800189c: 2600 movs r6, #0 + 800189e: 42a6 cmp r6, r4 + 80018a0: d105 bne.n 80018ae <__libc_init_array+0x2e> + 80018a2: bd70 pop {r4, r5, r6, pc} + 80018a4: f855 3b04 ldr.w r3, [r5], #4 + 80018a8: 4798 blx r3 + 80018aa: 3601 adds r6, #1 + 80018ac: e7ee b.n 800188c <__libc_init_array+0xc> + 80018ae: f855 3b04 ldr.w r3, [r5], #4 + 80018b2: 4798 blx r3 + 80018b4: 3601 adds r6, #1 + 80018b6: e7f2 b.n 800189e <__libc_init_array+0x1e> + 80018b8: 08001900 .word 0x08001900 + 80018bc: 08001900 .word 0x08001900 + 80018c0: 08001900 .word 0x08001900 + 80018c4: 08001904 .word 0x08001904 + +080018c8 <_init>: + 80018c8: b5f8 push {r3, r4, r5, r6, r7, lr} + 80018ca: bf00 nop + 80018cc: bcf8 pop {r3, r4, r5, r6, r7} + 80018ce: bc08 pop {r3} + 80018d0: 469e mov lr, r3 + 80018d2: 4770 bx lr + +080018d4 <_fini>: + 80018d4: b5f8 push {r3, r4, r5, r6, r7, lr} + 80018d6: bf00 nop + 80018d8: bcf8 pop {r3, r4, r5, r6, r7} + 80018da: bc08 pop {r3} + 80018dc: 469e mov lr, r3 + 80018de: 4770 bx lr diff --git a/Ejercicio_delayNB_1/Debug/Src/subdir.mk b/Ejercicio_delayNB_1/Debug/Src/subdir.mk index d660a3d58..7484ac379 100644 --- a/Ejercicio_delayNB_1/Debug/Src/subdir.mk +++ b/Ejercicio_delayNB_1/Debug/Src/subdir.mk @@ -1,6 +1,6 @@ ################################################################################ # Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +# Toolchain: GNU Tools for STM32 (10.3-2021.10) ################################################################################ # Add inputs and outputs from these tool invocations to the build variables @@ -15,6 +15,13 @@ C_DEPS += \ # Each subdirectory must supply rules for building sources it contributes -Src/%.o: ../Src/%.c Src/subdir.mk - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32 -DSTM32F429ZITx -DSTM32F4 -DNUCLEO_F429ZI -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Inc -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/STM32F4xx_HAL_Driver/Inc" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Include" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Device/ST/STM32F4xx/Include" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/BSP/STM32F4xx_Nucleo_144" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/Core/Inc" -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" +Src/%.o Src/%.su Src/%.cyclo: ../Src/%.c Src/subdir.mk + arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32 -DSTM32F429ZITx -DSTM32F4 -DNUCLEO_F429ZI -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Inc -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/STM32F4xx_HAL_Driver/Inc" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Include" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Device/ST/STM32F4xx/Include" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/BSP/STM32F4xx_Nucleo_144" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/Core/Inc" -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" + +clean: clean-Src + +clean-Src: + -$(RM) ./Src/main.cyclo ./Src/main.d ./Src/main.o ./Src/main.su + +.PHONY: clean-Src diff --git a/Ejercicio_delayNB_1/Debug/Startup/subdir.mk b/Ejercicio_delayNB_1/Debug/Startup/subdir.mk index 104493cc4..ea2902048 100644 --- a/Ejercicio_delayNB_1/Debug/Startup/subdir.mk +++ b/Ejercicio_delayNB_1/Debug/Startup/subdir.mk @@ -1,6 +1,6 @@ ################################################################################ # Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +# Toolchain: GNU Tools for STM32 (10.3-2021.10) ################################################################################ # Add inputs and outputs from these tool invocations to the build variables @@ -16,5 +16,12 @@ S_DEPS += \ # Each subdirectory must supply rules for building sources it contributes Startup/%.o: ../Startup/%.s Startup/subdir.mk - arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/STM32F4xx_HAL_Driver/Inc" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Include" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Device/ST/STM32F4xx/Include" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/BSP/STM32F4xx_Nucleo_144" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Inc" -I"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/Core/Inc" -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<" + arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/STM32F4xx_HAL_Driver/Inc" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Include" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/CMSIS/Device/ST/STM32F4xx/Include" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/BSP/STM32F4xx_Nucleo_144" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Inc" -I"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/Drivers/Core/Inc" -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<" + +clean: clean-Startup + +clean-Startup: + -$(RM) ./Startup/startup_stm32f429xx.d ./Startup/startup_stm32f429xx.o + +.PHONY: clean-Startup diff --git a/Ejercicio_delayNB_1/Debug/makefile b/Ejercicio_delayNB_1/Debug/makefile index 8c4842014..e56c8d547 100644 --- a/Ejercicio_delayNB_1/Debug/makefile +++ b/Ejercicio_delayNB_1/Debug/makefile @@ -1,6 +1,6 @@ ################################################################################ # Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +# Toolchain: GNU Tools for STM32 (10.3-2021.10) ################################################################################ -include ../makefile.init @@ -16,7 +16,6 @@ RM := rm -rf -include Drivers/Core/Src/subdir.mk -include Drivers/CMSIS/subdir.mk -include Drivers/BSP/STM32F4xx_Nucleo_144/subdir.mk --include subdir.mk -include objects.mk ifneq ($(MAKECMDGOALS),clean) @@ -48,15 +47,15 @@ BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME)$(if $(BUILD_ART EXECUTABLES += \ Ejercicio_delayNB_1.elf \ +MAP_FILES += \ +Ejercicio_delayNB_1.map \ + SIZE_OUTPUT += \ default.size.stdout \ OBJDUMP_LIST += \ Ejercicio_delayNB_1.list \ -OBJCOPY_BIN += \ -Ejercicio_delayNB_1.bin \ - # All Target all: main-build @@ -65,8 +64,8 @@ all: main-build main-build: Ejercicio_delayNB_1.elf secondary-outputs # Tool invocations -Ejercicio_delayNB_1.elf: $(OBJS) $(USER_OBJS) /home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/STM32F429ZITX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS) - arm-none-eabi-gcc -o "Ejercicio_delayNB_1.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"/home/pato/Embebidos/CESE/PdM_workspace/Ejercicio_delayNB_1/STM32F429ZITX_FLASH.ld" --specs=nosys.specs -Wl,-Map="Ejercicio_delayNB_1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +Ejercicio_delayNB_1.elf Ejercicio_delayNB_1.map: $(OBJS) $(USER_OBJS) /home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/STM32F429ZITX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-gcc -o "Ejercicio_delayNB_1.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"/home/fm/CESE/PdM_workspace/Ejercicio_delayNB_1/STM32F429ZITX_FLASH.ld" --specs=nosys.specs -Wl,-Map="Ejercicio_delayNB_1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group @echo 'Finished building target: $@' @echo ' ' @@ -80,17 +79,12 @@ Ejercicio_delayNB_1.list: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_D @echo 'Finished building: $@' @echo ' ' -Ejercicio_delayNB_1.bin: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS) - arm-none-eabi-objcopy -O binary $(EXECUTABLES) "Ejercicio_delayNB_1.bin" - @echo 'Finished building: $@' - @echo ' ' - # Other Targets clean: - -$(RM) $(SIZE_OUTPUT)$(OBJDUMP_LIST)$(EXECUTABLES)$(OBJS)$(S_DEPS)$(S_UPPER_DEPS)$(C_DEPS)$(OBJCOPY_BIN) Ejercicio_delayNB_1.elf + -$(RM) Ejercicio_delayNB_1.elf Ejercicio_delayNB_1.list Ejercicio_delayNB_1.map default.size.stdout -@echo ' ' -secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST) $(OBJCOPY_BIN) +secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST) fail-specified-linker-script-missing: @echo 'Error: Cannot find the specified linker script. Check the linker settings in the build configuration.' @@ -99,6 +93,6 @@ fail-specified-linker-script-missing: warn-no-linker-script-specified: @echo 'Warning: No linker script specified. Check the linker settings in the build configuration.' -.PHONY: all clean dependents fail-specified-linker-script-missing warn-no-linker-script-specified +.PHONY: all clean dependents main-build fail-specified-linker-script-missing warn-no-linker-script-specified -include ../makefile.targets diff --git a/Ejercicio_delayNB_1/Debug/objects.list b/Ejercicio_delayNB_1/Debug/objects.list index 0db0f1a1c..082414a1f 100644 --- a/Ejercicio_delayNB_1/Debug/objects.list +++ b/Ejercicio_delayNB_1/Debug/objects.list @@ -45,6 +45,7 @@ "./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o" "./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.o" "./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_mmc.o" +"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp.o" "./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_msp_template.o" "./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.o" "./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.o" diff --git a/Ejercicio_delayNB_1/Debug/objects.mk b/Ejercicio_delayNB_1/Debug/objects.mk index e12976df0..e423e316b 100644 --- a/Ejercicio_delayNB_1/Debug/objects.mk +++ b/Ejercicio_delayNB_1/Debug/objects.mk @@ -1,6 +1,6 @@ ################################################################################ # Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +# Toolchain: GNU Tools for STM32 (10.3-2021.10) ################################################################################ USER_OBJS := diff --git a/Ejercicio_delayNB_1/Debug/sources.mk b/Ejercicio_delayNB_1/Debug/sources.mk index a52477060..3718fad3e 100644 --- a/Ejercicio_delayNB_1/Debug/sources.mk +++ b/Ejercicio_delayNB_1/Debug/sources.mk @@ -1,6 +1,6 @@ ################################################################################ # Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (9-2020-q2-update) +# Toolchain: GNU Tools for STM32 (10.3-2021.10) ################################################################################ ELF_SRCS := @@ -9,14 +9,16 @@ S_SRCS := C_SRCS := S_UPPER_SRCS := O_SRCS := +CYCLO_FILES := SIZE_OUTPUT := OBJDUMP_LIST := +SU_FILES := EXECUTABLES := OBJS := +MAP_FILES := S_DEPS := S_UPPER_DEPS := C_DEPS := -OBJCOPY_BIN := # Every subdirectory with source files must be described here SUBDIRS := \ diff --git a/GPIO_IOToggle/Src/main.c b/GPIO_IOToggle/Src/main.c index 8b87ab1bf..8774ef9b2 100644 --- a/GPIO_IOToggle/Src/main.c +++ b/GPIO_IOToggle/Src/main.c @@ -80,7 +80,7 @@ int main(void) HAL_GPIO_TogglePin(GPIOA, GPIO_PIN_5); /* Insert delay 100 ms */ - HAL_Delay(700); + HAL_Delay(250); } }