Pin remapping?

[brainstorm]

I flashed it successfully on a f042 dev board, but I wonder which interface config to use on OpenOCD given the USB VID:PID?:

$ lsusb
(...)
Bus 020 Device 024: ID 0403:6010 Future Technology Devices International Limited Dual RS232  Serial: Nope, it's STM32F042

$ grep -r 6010 interface/ftdi/*
altera-usb-blaster2.cfg:usb_blaster_vid_pid 0x09fb 0x6010 0x09fb 0x6810
ftdi/flossjtag.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/dp_busblaster.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/lisa-l.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/dp_busblaster_kt-link.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/minispartan6.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/mbftdi.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/openocd-usb.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/flossjtag-noeeprom.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/iotlab-usb.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/opendous_ftdi.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/openocd-usb-hs.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/flyswatter.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/flyswatter2.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/ngxtech.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/calao-usb-a9260-c01.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/vpaclink.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/dlp-usb1232h.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/gw16042.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/axm0432.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/redbee-econotag.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/arty-onboard-ftdi.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/m53evk.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/digilent-hs1.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/redbee-usb.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/incircuit-icprog.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/minimodule-swd.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/xds100v2.cfg:ftdi_vid_pid 0x0403 0xa6d0 0x0403 0x6010
ftdi/esp32s2_kaluga_v1.cfg:ftdi_vid_pid 0x0403 0x6010 0x0403 0x6014
ftdi/tumpa.cfg:ftdi_vid_pid 0x0403 0x8a98 0x0403 0x6010
ftdi/snps_sdp.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/pipistrello.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/minimodule.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/steppenprobe.cfg:ftdi_vid_pid 0x0403 0x6010
ftdi/esp32_devkitj_v1.cfg:ftdi_vid_pid 0x0403 0x6010 0x0403 0x6014

Just a side note as I go, I'll probably figure out myself with some trial and error, but it would be nice to have it right away on the README.md... for instance the commands you used to talk to the RISCV test you mentioned on twitter? ;)

[brainstorm]

Yup, just half-figured it out now:

$ ./src/openocd -f tcl/interface/ftdi/esp32s2_kaluga_v1.cfg -f tcl/target/esp32s2.cfg
Open On-Chip Debugger 0.11.0-rc2+devv0.10.0-esp32-20201202-613-g436e659c-dirty (2021-01-30-01:08)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
DEPRECATED! use 'adapter driver' not 'interface'
DEPRECATED! use 'adapter speed' not 'adapter_khz'
adapter speed: 20000 kHz

Info : FreeRTOS creation
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : ftdi: if you experience problems at higher adapter clocks, try the command "ftdi_tdo_sample_edge falling"
Info : clock speed 20000 kHz
Error: JTAG scan chain interrogation failed: all zeroes
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: esp32s2.cpu: IR capture error; saw 0x00 not 0x01
Warn : Bypassing JTAG setup events due to errors
Warn : target esp32s2 examination failed
Info : starting gdb server for esp32s2 on 3333
Info : Listening on port 3333 for gdb connections
^Cshutdown command invoked

But I need to remap some pins since those used in main.rs are already being used for something else on my dev board... I hope it's not too painful to change pin assignments :-S

EDIT Nah, piece of cake... erm, perhaps need to check the assembly side...:

diff --git a/Embed.toml b/Embed.toml
index 1cfda2f..e935b9d 100644
--- a/Embed.toml
+++ b/Embed.toml
@@ -1,6 +1,6 @@
 [default.probe]
 usb_vid = "0483"
-usb_pid = "374b"
+usb_pid = "3748"  // using a chinese stlinkv2 clone of a clone (CK32) for SWD flashing
 protocol = "Swd"

 [default.flashing]
diff --git a/src/main.rs b/src/main.rs
index 7de8ec3..b1d4813 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -38,13 +38,14 @@ fn main() -> ! {
     let mut rcc = rcc_cfgr.sysclk(48.mhz()).pclk(48.mhz()).freeze(&mut dp.FLASH);

     let gpioa = dp.GPIOA.split(&mut rcc);
+    let gpiob = dp.GPIOB.split(&mut rcc);

     // Construct fake critical section
     let cs = unsafe { core::mem::zeroed() };
-    let tms = gpioa.pa4.into_push_pull_output_hs(&cs);
-    let tck = gpioa.pa5.into_push_pull_output_hs(&cs);
-    let tdo = gpioa.pa6.into_floating_input(&cs);
-    let tdi = gpioa.pa7.into_push_pull_output_hs(&cs);
+    let tms = gpioa.pa15.into_push_pull_output_hs(&cs);  // was 4
+    let tck = gpiob.pb5.into_push_pull_output_hs(&cs);  // was 5
+    let tdo = gpiob.pb4.into_floating_input(&cs);       // was 6
+    let tdi = gpiob.pb3.into_push_pull_output_hs(&cs);  // was 7
     drop(cs);

     let hw = Hardware::new();

I guess you are setting the regs on BSRR via statements like this?:

    LDR     R4, =0x00a00080 // R4 <- [TCK0+TDI0+TDI1]

I'll have to get more familiar with that asm.s it seems if I want to remap some pins :-S

[brainstorm]

Essentially I would like to do this re-mapping of the pins:

diff --git a/asm.s b/asm.s
index 4f7ba11..0b0da23 100644
--- a/asm.s
+++ b/asm.s
@@ -2,10 +2,10 @@

 // GPIOA.IDR: 0x48000010
 // GPIOA.BSRR: 0x48000018
-// TCK: 5
-// TDI: 7
-// TDO: 6
-// TMS: 4
+// TCK: B5     (was A5)
+// TDI: B3     (was A7)
+// TDO: B4     (was A6)
+// TMS: A15    (was A4)

But it'll take a while longer (for me) to do parse through the asm.s and get it right ;)

[Disasm]

Assembly file makes a lot of assumptions about pins used. The implementation assumes fixed pin numbers (listed at the top) as well as all pins sitting on the same GPIO port. If you use different pins, you will have to rewrite a lot of assembly code.

For RISC-V I used the same command mentioned in the longan-nano repo:
/path/to/openocd -f sipeed-jtag.cfg -f openocd.cfg