From 9cd022cba8aa3c73dc68f758c9776cea0a571a62 Mon Sep 17 00:00:00 2001
From: David O'Connor <the_alchemist@fastmail.com>
Date: Tue, 19 Dec 2023 09:02:08 -0500
Subject: [PATCH] Upped version number

---
 Cargo.toml             |  2 +-
 src/clocks/baseline.rs | 13 ++++++-------
 2 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/Cargo.toml b/Cargo.toml
index 88209d8..907b5f0 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "stm32-hal2"
-version = "1.6.4"
+version = "1.7.0"
 authors = ["David O'Connor <david.alan.oconnor@gmail.com>"]
 description = "Hardware abstraction layer for the STM32 MCUs"
 keywords = ["no-std", "stm32", "embedded", "embedded-hal"]
diff --git a/src/clocks/baseline.rs b/src/clocks/baseline.rs
index e613e53..0b87058 100644
--- a/src/clocks/baseline.rs
+++ b/src/clocks/baseline.rs
@@ -1152,7 +1152,6 @@ impl Clocks {
     pub fn reselect_input(&self) -> Result<(), RccError> {
         let rcc = unsafe { &(*RCC::ptr()) };
 
-        // let mut i = 0;
         macro_rules! wait_hang {
             ($i:expr) => {
                 $i += 1;
@@ -1192,7 +1191,7 @@ impl Clocks {
                         // Generally reverts to MSI (see note below)
                         if let StopWuck::Msi = self.stop_wuck {
                             rcc.cr.modify(|_, w| w.hsion().set_bit());
-                            i = 0;
+                            let mut i = 0;
                             while rcc.cr.read().hsirdy().bit_is_clear() {
                                 wait_hang!(i);
                             }
@@ -1213,7 +1212,7 @@ impl Clocks {
 
                         if let StopWuck::Hsi = self.stop_wuck {
                             rcc.cr.modify(|_, w| w.msion().set_bit());
-                            i = 0;
+                            let mut i = 0;
                             while rcc.cr.read().msirdy().bit_is_clear() {
                                 wait_hang!(i);
                             }
@@ -1251,7 +1250,7 @@ impl Clocks {
                     #[cfg(not(any(feature = "g0", feature = "g4")))]
                     if let StopWuck::Msi = self.stop_wuck {
                         rcc.cr.modify(|_, w| w.hsion().set_bit());
-                        i = 0;
+                        let mut i = 0;
                         while rcc.cr.read().hsirdy().bit_is_clear() {
                             wait_hang!(i);
                         }
@@ -1275,7 +1274,7 @@ impl Clocks {
 
                 if let StopWuck::Hsi = self.stop_wuck {
                     rcc.cr.modify(|_, w| w.msion().set_bit());
-                    i = 0;
+                    let mut i = 0;
                     while rcc.cr.read().msirdy().bit_is_clear() {
                         wait_hang!(i);
                     }
@@ -1287,7 +1286,7 @@ impl Clocks {
             #[cfg(feature = "g0")]
             InputSrc::Lsi => {
                 rcc.csr.modify(|_, w| w.lsion().set_bit());
-                i = 0;
+                let mut i = 0;
                 while rcc.csr.read().lsirdy().bit_is_clear() {
                     wait_hang!(i);
                 }
@@ -1297,7 +1296,7 @@ impl Clocks {
             #[cfg(feature = "g0")]
             InputSrc::Lse => {
                 rcc.bdcr.modify(|_, w| w.lseon().set_bit());
-                i = 0;
+                let mut i = 0;
                 while rcc.bdcr.read().lserdy().bit_is_clear() {
                     wait_hang!(i);
                 }