diff --git a/build/alveo-u200/Makefile b/build/alveo-u200/Makefile new file mode 100644 index 000000000..0acb6d730 --- /dev/null +++ b/build/alveo-u200/Makefile @@ -0,0 +1,30 @@ +# Makefile: Makefile for build the whole card design +# Copyright (C) 2023 CESNET z.s.p.o. +# Author(s): Vadislav Valek +# +# SPDX-License-Identifier: BSD-3-Clause + +# NOTE: Usage of the configuration parameters in this file is described +# in the Parametrization section of the NDK-CORE documentation. + +COMBO_BASE = ../.. +CARD_BASE = $(COMBO_BASE)/ndk/cards/amd/alveo-u200 +APP_CONF = app_conf.tcl +OUTPUT_NAME = alveo-u200-minimal + +ETH_PORT_SPEED=100 +ETH_PORT_CHAN=1 + +.PHONY: all 100g2 100g0 + +all: 100g2 + +100g2: ETH_PORTS=2 +100g2: OUTPUT_NAME:=alveo-u200-minimal-100g2 +100g2: build + +100g0: ETH_PORTS=0 +100g0: OUTPUT_NAME:=alveo-u200-minimal-100g0 +100g0: build + +include $(CARD_BASE)/src/card.mk diff --git a/build/alveo-u200/Vivado.tcl b/build/alveo-u200/Vivado.tcl new file mode 100644 index 000000000..f03f94218 --- /dev/null +++ b/build/alveo-u200/Vivado.tcl @@ -0,0 +1,31 @@ +# Vivado.tcl: Vivado tcl script to compile whole FPGA design +# Copyright (C) 2023 CESNET z. s. p. o. +# Author(s): Vladislav Valek +# +# SPDX-License-Identifier: BSD-3-Clause + +# NOTE: The purpose of this file is described in the Parametrization section of +# the NDK-CORE documentation. + +# ----- Setting basic synthesis options --------------------------------------- +# NDK & user constants +source $env(CARD_BASE)/src/Vivado.inc.tcl + +# Create only a Quartus project for further design flow driven from Quartus GUI +# "0" ... full design flow in command line +# "1" ... project composition only for further dedesign flow in GUI +set SYNTH_FLAGS(PROJ_ONLY) "0" + +# Associative array which is propagated to APPLICATION_CORE, add other +# parameters if necessary. +set APP_ARCHGRP(APP_CORE_ENABLE) $APP_CORE_ENABLE + +# Convert associative array to list +set APP_ARCHGRP_L [array get APP_ARCHGRP] + +# ----- Add application core to main component list --------------------------- +lappend HIERARCHY(COMPONENTS) \ + [list "APPLICATION_CORE" "../../app/top" $APP_ARCHGRP_L] + +# Call main function which handle targets +nb_main diff --git a/build/alveo-u200/app_conf.tcl b/build/alveo-u200/app_conf.tcl new file mode 100644 index 000000000..e5fdbd1bb --- /dev/null +++ b/build/alveo-u200/app_conf.tcl @@ -0,0 +1,25 @@ +# app_conf.tcl: User parameters for AMD Alveo U200 Card +# Copyright (C) 2023 CESNET z.s.p.o. +# Author(s): Vladislav Valek +# +# SPDX-License-Identifier: BSD-3-Clause + +# NOTE: The detailed description of the usage of this file can be viewed in the +# Parametrizing section of the NDK-CORE documentation. + +# ------------------------------------------------------------------------------ +# DMA parameters: +# ------------------------------------------------------------------------------ +# The minimum number of RX/TX DMA channels for this card is 16. +set DMA_RX_CHANNELS 4 +set DMA_TX_CHANNELS 4 +# In blocking mode, packets are dropped only when the RX DMA channel is off. +# In non-blocking mode, packets are dropped whenever they cannot be sent. +set DMA_RX_BLOCKING_MODE true + +# ------------------------------------------------------------------------------ +# Other parameters: +# ------------------------------------------------------------------------------ +set PROJECT_NAME "NDK_MINIMAL" +set PROJECT_VARIANT "$ETH_PORT_SPEED(0)G$ETH_PORTS" +set PROJECT_VERSION [exec cat ../../VERSION] diff --git a/build/alveo-u200/jenkins/100g2.jenkinsfile b/build/alveo-u200/jenkins/100g2.jenkinsfile new file mode 100644 index 000000000..1833b300f --- /dev/null +++ b/build/alveo-u200/jenkins/100g2.jenkinsfile @@ -0,0 +1,12 @@ +library 'liberouter' + +stagesFirmware( + dir: 'build/alveo-u200', + target: '100g2', + project: 'alveo-u200-minimal-100g2', + pollscm: 'H H(0-11) * * 6', + rpms: false, + rename: false, + artifacts: 'alveo-u200-minimal-100g2', + lastBuilds: 2, +) diff --git a/build/vcu118/Makefile b/build/vcu118/Makefile new file mode 100644 index 000000000..5edc33982 --- /dev/null +++ b/build/vcu118/Makefile @@ -0,0 +1,30 @@ +# Makefile: Makefile for VCU118 +# Copyright (C) 2023 CESNET z.s.p.o. +# Author(s): Vadislav Valek +# +# SPDX-License-Identifier: BSD-3-Clause + +# NOTE: Usage of the configuration parameters in this file is described +# in the Parametrization section of the NDK-CORE documentation. + +COMBO_BASE = ../.. +CARD_BASE = $(COMBO_BASE)/ndk/cards/amd/vcu118 +APP_CONF = app_conf.tcl +OUTPUT_NAME = vcu118-minimal + +ETH_PORT_SPEED=100 +ETH_PORT_CHAN=1 + +.PHONY: all 100g2 100g0 + +all: 100g2 + +100g2: ETH_PORTS=2 +100g2: OUTPUT_NAME:=vcu118-minimal-100g2 +100g2: build + +100g0: ETH_PORTS=0 +100g0: OUTPUT_NAME:=vcu118-minimal-100g0 +100g0: build + +include $(CARD_BASE)/src/card.mk diff --git a/build/vcu118/Vivado.tcl b/build/vcu118/Vivado.tcl new file mode 100644 index 000000000..f03f94218 --- /dev/null +++ b/build/vcu118/Vivado.tcl @@ -0,0 +1,31 @@ +# Vivado.tcl: Vivado tcl script to compile whole FPGA design +# Copyright (C) 2023 CESNET z. s. p. o. +# Author(s): Vladislav Valek +# +# SPDX-License-Identifier: BSD-3-Clause + +# NOTE: The purpose of this file is described in the Parametrization section of +# the NDK-CORE documentation. + +# ----- Setting basic synthesis options --------------------------------------- +# NDK & user constants +source $env(CARD_BASE)/src/Vivado.inc.tcl + +# Create only a Quartus project for further design flow driven from Quartus GUI +# "0" ... full design flow in command line +# "1" ... project composition only for further dedesign flow in GUI +set SYNTH_FLAGS(PROJ_ONLY) "0" + +# Associative array which is propagated to APPLICATION_CORE, add other +# parameters if necessary. +set APP_ARCHGRP(APP_CORE_ENABLE) $APP_CORE_ENABLE + +# Convert associative array to list +set APP_ARCHGRP_L [array get APP_ARCHGRP] + +# ----- Add application core to main component list --------------------------- +lappend HIERARCHY(COMPONENTS) \ + [list "APPLICATION_CORE" "../../app/top" $APP_ARCHGRP_L] + +# Call main function which handle targets +nb_main diff --git a/build/vcu118/app_conf.tcl b/build/vcu118/app_conf.tcl new file mode 100644 index 000000000..55b3db17c --- /dev/null +++ b/build/vcu118/app_conf.tcl @@ -0,0 +1,25 @@ +# app_conf.tcl: User parameters for fb4cgg3/fb2cgg3 card +# Copyright (C) 2023 CESNET z.s.p.o. +# Author(s): Vladislav Valek +# +# SPDX-License-Identifier: BSD-3-Clause + +# NOTE: The detailed description of the usage of this file can be viewed in the +# Parametrizing section of the NDK-CORE documentation. + +# ------------------------------------------------------------------------------ +# DMA parameters: +# ------------------------------------------------------------------------------ +# The minimum number of RX/TX DMA channels for this card is 16. +set DMA_RX_CHANNELS 4 +set DMA_TX_CHANNELS 4 +# In blocking mode, packets are dropped only when the RX DMA channel is off. +# In non-blocking mode, packets are dropped whenever they cannot be sent. +set DMA_RX_BLOCKING_MODE true + +# ------------------------------------------------------------------------------ +# Other parameters: +# ------------------------------------------------------------------------------ +set PROJECT_NAME "NDK_MINIMAL" +set PROJECT_VARIANT "$ETH_PORT_SPEED(0)G$ETH_PORTS" +set PROJECT_VERSION [exec cat ../../VERSION] diff --git a/build/vcu118/jenkins/100g2.jenkinsfile b/build/vcu118/jenkins/100g2.jenkinsfile new file mode 100644 index 000000000..e1a903bf1 --- /dev/null +++ b/build/vcu118/jenkins/100g2.jenkinsfile @@ -0,0 +1,12 @@ +library 'liberouter' + +stagesFirmware( + dir: 'build/vcu118', + target: '100g2', + project: 'vcu118-minimal-100g2', + pollscm: 'H H(0-11) * * 6', + rpms: false, + rename: false, + artifacts: 'vcu118-minimal-100g2', + lastBuilds: 2, +) diff --git a/ndk/cards b/ndk/cards index 6ff24c1b9..9a04726ce 160000 --- a/ndk/cards +++ b/ndk/cards @@ -1 +1 @@ -Subproject commit 6ff24c1b9419c8c745e388b1d2d2b506dc929cb2 +Subproject commit 9a04726ce07c94d8bcf25052d884fe29e9f3d6e9