From b4e16a8b8dfd0141ab9e9e138643e4e714171e40 Mon Sep 17 00:00:00 2001
From: yufeng <321353225@qq.com>
Date: Sat, 14 Sep 2024 15:22:36 +0800
Subject: [PATCH] feat: refactor Instruction and multicore

---
 Cargo.toml                                    |  4 +-
 example/Cargo.toml                            |  3 +-
 example/src/frame.rs                          |  4 +-
 example/src/main.rs                           | 25 +++++---
 src/components/boot/aarch64.rs                | 11 ++--
 src/components/boot/loongarch64.rs            | 64 +++++++++----------
 src/components/boot/mod.rs                    | 17 +++++
 src/components/boot/riscv64.rs                | 11 ++--
 src/components/boot/x86_64.rs                 | 37 ++++++-----
 src/components/consts/riscv64.rs              | 10 ---
 src/components/instruction/aarch64.rs         |  9 ++-
 .../instruction/aarch64/shutdown.rs           | 12 ++--
 src/components/instruction/loongarch64.rs     | 24 +++----
 src/components/instruction/mod.rs             |  7 +-
 src/components/instruction/riscv64.rs         | 25 +++++---
 .../instruction/riscv64/shutdown.rs           | 19 +++---
 src/components/instruction/x86_64.rs          |  9 ++-
 src/components/instruction/x86_64/shutdown.rs | 14 ++--
 src/components/irq/loongarch64.rs             |  2 +
 src/components/mod.rs                         |  1 -
 src/components/multicore/aarch64.rs           |  7 --
 src/components/multicore/loongarch64.rs       | 12 ----
 src/components/multicore/mod.rs               | 12 ++--
 src/components/multicore/riscv64.rs           | 57 ++---------------
 src/components/multicore/x86_64.rs            |  6 --
 src/components/trap/aarch64.rs                | 12 ----
 src/components/trap/loongarch64.rs            | 27 +++-----
 src/components/trap/x86_64.rs                 | 14 +---
 src/lib.rs                                    | 18 ------
 29 files changed, 190 insertions(+), 283 deletions(-)

diff --git a/Cargo.toml b/Cargo.toml
index c1f3a7f..5fdcc4b 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -10,15 +10,13 @@ repository = "https://github.com/Byte-OS/polyhal"
 # See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
 
 [features]
-kcontext = []
-multicore = ["boot"]
 trap = []
 boot = []
 logger = []
 
 graphic = []
 
-default = ["boot", "kcontext"]
+default = ["boot"]
 
 [dependencies]
 log = "0.4"
diff --git a/example/Cargo.toml b/example/Cargo.toml
index 11e46cf..f163373 100644
--- a/example/Cargo.toml
+++ b/example/Cargo.toml
@@ -11,8 +11,7 @@ polyhal = { version = "0.1.2", features = [
   "logger",
   "boot",
   "trap",
-  "graphic",
-  "multicore"
+  "graphic"
 ] }
 log = "0.4"
 fdt = "0.1.5"
diff --git a/example/src/frame.rs b/example/src/frame.rs
index 00484eb..97f6214 100644
--- a/example/src/frame.rs
+++ b/example/src/frame.rs
@@ -11,10 +11,10 @@ pub fn add_frame_range(mm_start: usize, mm_end: usize) {
     LOCK_FRAME_ALLOCATOR.lock().add_frame(start, end);
 }
 
-pub fn frame_alloc() -> PhysPage {
+pub fn frame_alloc(count: usize) -> PhysPage {
     let ppn = LOCK_FRAME_ALLOCATOR
         .lock()
-        .alloc(1)
+        .alloc(count)
         .expect("can't find memory page");
     PhysPage::new(ppn)
 }
diff --git a/example/src/main.rs b/example/src/main.rs
index 99b7248..e5c34dd 100644
--- a/example/src/main.rs
+++ b/example/src/main.rs
@@ -11,16 +11,19 @@ use core::panic::PanicInfo;
 use frame::frame_alloc;
 use polyhal::addr::PhysPage;
 use polyhal::common::{get_mem_areas, PageAlloc};
+use polyhal::consts::VIRT_ADDR_START;
 use polyhal::debug_console::DebugConsole;
-use polyhal::instruction::Instruction;
+use polyhal::instruction::{ebreak, shutdown};
+use polyhal::multicore::boot_core;
+use polyhal::pagetable::PAGE_SIZE;
 use polyhal::trap::TrapType::{self, *};
-use polyhal::trapframe::TrapFrame;
+use polyhal::trapframe::{TrapFrame, TrapFrameArgs};
 
 pub struct PageAllocImpl;
 
 impl PageAlloc for PageAllocImpl {
     fn alloc(&self) -> PhysPage {
-        frame_alloc()
+        frame_alloc(1)
     }
 
     fn dealloc(&self, ppn: PhysPage) {
@@ -33,7 +36,9 @@ impl PageAlloc for PageAllocImpl {
 fn kernel_interrupt(ctx: &mut TrapFrame, trap_type: TrapType) {
     // println!("trap_type @ {:x?} {:#x?}", trap_type, ctx);
     match trap_type {
-        Breakpoint => return,
+        Breakpoint => {
+            log::info!("@BP @ {:#x}", ctx[TrapFrameArgs::SEPC]);
+        }
         SysCall => {
             // jump to next instruction anyway
             ctx.syscall_ok();
@@ -77,11 +82,15 @@ fn main(hartid: usize) {
 
     get_mem_areas().into_iter().for_each(|(start, size)| {
         println!("init memory region {:#x} - {:#x}", start, start + size);
-        // frame::add_frame_range(start, start + size);
+        frame::add_frame_range(start, start + size);
     });
 
-    polyhal::multicore::MultiCore::boot_all();
+    // Boot another core that id is 1.
+    let sp = frame_alloc(16);
+    boot_core(1, (sp.to_addr() | VIRT_ADDR_START) + 16 * PAGE_SIZE);
 
+    // Test BreakPoint
+    ebreak();
 
     crate::pci::init();
 
@@ -92,7 +101,7 @@ fn main(hartid: usize) {
     }
 
     log::info!("Run END. Shutdown successfully.");
-    Instruction::shutdown();
+    shutdown();
 }
 
 #[panic_handler]
@@ -107,5 +116,5 @@ fn panic(info: &PanicInfo) -> ! {
     } else {
         log::error!("[kernel] Panicked: {}", info.message().unwrap());
     }
-    Instruction::shutdown()
+    shutdown()
 }
diff --git a/src/components/boot/aarch64.rs b/src/components/boot/aarch64.rs
index 2b8c95d..79ce5d4 100644
--- a/src/components/boot/aarch64.rs
+++ b/src/components/boot/aarch64.rs
@@ -5,16 +5,16 @@ use fdt::Fdt;
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 use crate::{
-    clear_bss,
     components::{
         common::{CPU_NUM, DTB_PTR},
         consts::VIRT_ADDR_START,
         debug_console::{display_info, println},
-        instruction::Instruction,
+        instruction,
         pagetable::{PTEFlags, TLB},
         percpu::percpu_area_init,
         timer,
     },
+    multicore::CpuCore,
     pagetable::PTE,
     PageTable, PhysPage,
 };
@@ -166,9 +166,10 @@ unsafe extern "C" fn _secondary_boot() -> ! {
 }
 
 pub fn rust_tmp_main(hart_id: usize, device_tree: usize) {
-    clear_bss();
+    super::clear_bss();
     percpu_area_init(hart_id);
-    // pl011::init_early();
+    CpuCore::init(hart_id);
+
     // Init DebugConsole early.
     crate::components::debug_console::init_early();
     #[cfg(feature = "logger")]
@@ -215,7 +216,7 @@ pub fn rust_tmp_main(hart_id: usize, device_tree: usize) {
     // Enter to kernel entry point(`main` function).
     unsafe { crate::components::boot::_main_for_arch(hart_id) };
 
-    Instruction::shutdown();
+    instruction::shutdown();
 }
 
 pub fn boot_page_table() -> PageTable {
diff --git a/src/components/boot/loongarch64.rs b/src/components/boot/loongarch64.rs
index 0b41606..9e3b833 100644
--- a/src/components/boot/loongarch64.rs
+++ b/src/components/boot/loongarch64.rs
@@ -1,22 +1,22 @@
-use loongArch64::{
-    consts::{LOONGARCH_CSR_MAIL_BUF0, LOONGARCH_CSR_MAIL_BUF1},
-    iocsr::iocsr_read_d,
-    register::euen,
-};
+use loongArch64::register::euen;
 
 use crate::{
     arch::hart_id,
-    clear_bss,
     components::{
         common::CPU_NUM,
         consts::VIRT_ADDR_START,
-        debug_console::{display_info, println},
-        instruction::Instruction,
+        debug_console::{display_info, println, DebugConsole},
         percpu::percpu_area_init,
+        timer,
     },
+    instruction,
+    multicore::CpuCore,
     PageTable, PhysAddr,
 };
 
+#[cfg(feature = "trap")]
+use crate::components::trap;
+
 /// The earliest entry point for the primary CPU.
 ///
 /// We can't use bl to jump to higher address, so we use jirl to jump to higher address.
@@ -103,10 +103,14 @@ pub(crate) unsafe extern "C" fn _start_secondary() -> ! {
 ///
 /// This function will be called after assembly boot stage.
 pub fn rust_tmp_main(hart_id: usize) {
-    clear_bss();
-    percpu_area_init(hart_id);
+    super::clear_bss();
+    // Initialize CPU Configuration.
+    init_cpu();
+
+    CpuCore::init(hart_id);
+
     #[cfg(feature = "logger")]
-    crate::components::debug_console::DebugConsole::log_init();
+    DebugConsole::log_init();
 
     // Display Information.
     display_info!();
@@ -117,45 +121,39 @@ pub fn rust_tmp_main(hart_id: usize) {
     display_info!("Boot HART ID", "{}", hart_id);
     display_info!();
 
-    #[cfg(feature = "trap")]
-    crate::components::trap::set_trap_vector_base();
-    // Initialize CPU Configuration.
-    init_cpu();
-    crate::components::timer::init_timer();
-    #[cfg(feature = "trap")]
-    crate::components::trap::tlb_init(crate::components::trap::tlb_fill as _);
-
     // TODO: Detect CPU Num dynamically.
     CPU_NUM.init_by(2);
 
-    unsafe { crate::components::boot::_main_for_arch(hart_id) };
+    unsafe { super::_main_for_arch(hart_id) };
 
-    Instruction::shutdown();
+    instruction::shutdown();
 }
 
 /// Initialize CPU Configuration.
 fn init_cpu() {
     // Enable floating point
     euen::set_fpe(true);
-}
 
-/// The entry point for the second core.
-pub(crate) extern "C" fn _rust_secondary_main() {
-    let hart_id = hart_id();
-    percpu_area_init(hart_id);
+    // Initialize the percpu area for this hart.
+    percpu_area_init(hart_id());
 
-    log::info!("mailbox: {:#x}", iocsr_read_d(LOONGARCH_CSR_MAIL_BUF0));
-    log::info!("mailbox: {:#x}", iocsr_read_d(LOONGARCH_CSR_MAIL_BUF1));
+    // Initialzie Timer
+    timer::init_timer();
 
+    // Initialize the trap and tlb fill function
     #[cfg(feature = "trap")]
-    crate::components::trap::set_trap_vector_base();
+    {
+        trap::set_trap_vector_base();
+        trap::tlb_init(trap::tlb_fill as _);
+    }
+}
+
+/// The entry point for the second core.
+pub(crate) extern "C" fn _rust_secondary_main() {
     // Initialize CPU Configuration.
     init_cpu();
-    crate::components::timer::init_timer();
-    #[cfg(feature = "trap")]
-    crate::components::trap::tlb_init(crate::components::trap::tlb_fill as _);
 
-    unsafe { crate::components::boot::_main_for_arch(hart_id) };
+    unsafe { super::_main_for_arch(hart_id()) };
 }
 
 pub fn boot_page_table() -> PageTable {
diff --git a/src/components/boot/mod.rs b/src/components/boot/mod.rs
index a120053..4438298 100644
--- a/src/components/boot/mod.rs
+++ b/src/components/boot/mod.rs
@@ -2,6 +2,8 @@
 //!
 //!
 
+use core::mem::size_of;
+
 // Define multi-architecture modules and pub use them.
 super::define_arch_mods!();
 
@@ -17,6 +19,21 @@ pub(crate) static mut BOOT_STACK: [u8; STACK_SIZE] = [0; STACK_SIZE];
 #[repr(align(4096))]
 pub(crate) struct PageAlignment([crate::pagetable::PTE; crate::PageTable::PTE_NUM_IN_PAGE]);
 
+/// Clear the bss section
+pub(crate) fn clear_bss() {
+    extern "C" {
+        fn _sbss();
+        fn _ebss();
+    }
+    unsafe {
+        core::slice::from_raw_parts_mut(
+            _sbss as usize as *mut u128,
+            (_ebss as usize - _sbss as usize) / size_of::<u128>(),
+        )
+        .fill(0);
+    }
+}
+
 // Declare the _main_for_arch exists.
 extern "Rust" {
     pub(crate) fn _main_for_arch(hartid: usize);
diff --git a/src/components/boot/riscv64.rs b/src/components/boot/riscv64.rs
index eb19afd..81ab504 100644
--- a/src/components/boot/riscv64.rs
+++ b/src/components/boot/riscv64.rs
@@ -4,8 +4,9 @@ use riscv::register::{sie, sstatus};
 use crate::components::common::{CPU_ID, CPU_NUM, DTB_PTR};
 use crate::components::consts::VIRT_ADDR_START;
 use crate::components::debug_console::{display_info, println};
-use crate::components::instruction::Instruction;
+use crate::components::instruction;
 use crate::components::pagetable::{PTEFlags, PTE};
+use crate::multicore::CpuCore;
 use crate::PageTable;
 
 use super::PageAlignment;
@@ -116,7 +117,7 @@ pub(crate) unsafe extern "C" fn secondary_start() -> ! {
 }
 
 pub(crate) fn rust_main(hartid: usize, device_tree: usize) {
-    crate::clear_bss();
+    super::clear_bss();
     #[cfg(feature = "logger")]
     crate::components::debug_console::DebugConsole::log_init();
     // Init allocator
@@ -125,6 +126,8 @@ pub(crate) fn rust_main(hartid: usize, device_tree: usize) {
     #[cfg(feature = "trap")]
     crate::components::trap::init();
 
+    CpuCore::init(hartid);
+
     // Initialize CPU Configuration.
     init_cpu();
 
@@ -154,7 +157,7 @@ pub(crate) fn rust_main(hartid: usize, device_tree: usize) {
     display_info!();
 
     unsafe { crate::components::boot::_main_for_arch(hartid) };
-    Instruction::shutdown();
+    instruction::shutdown();
 }
 
 /// Secondary Main function Entry.
@@ -176,7 +179,7 @@ pub(crate) extern "C" fn rust_secondary_main(hartid: usize) {
 
     log::info!("secondary hart {} started", hartid);
     unsafe { crate::components::boot::_main_for_arch(hartid) };
-    Instruction::shutdown();
+    instruction::shutdown();
 }
 
 #[inline]
diff --git a/src/components/boot/x86_64.rs b/src/components/boot/x86_64.rs
index 2de6c13..4571760 100644
--- a/src/components/boot/x86_64.rs
+++ b/src/components/boot/x86_64.rs
@@ -7,13 +7,15 @@ use x86_64::registers::control::{Cr0Flags, Cr4, Cr4Flags};
 use x86_64::registers::model_specific::EferFlags;
 use x86_64::registers::xcontrol::{XCr0, XCr0Flags};
 
-use crate::components::arch::{get_com_port, hart_id, MBOOT_PTR};
+use crate::components::arch::{self, get_com_port, hart_id, MBOOT_PTR};
 use crate::components::common::{CPU_ID, CPU_NUM};
 use crate::components::consts::VIRT_ADDR_START;
-use crate::components::debug_console::{display_info, println};
-use crate::components::instruction::Instruction;
+use crate::components::debug_console::{self, display_info, println};
 use crate::components::pagetable::PageTable;
 use crate::components::percpu::set_local_thread_pointer;
+use crate::components::timer;
+use crate::instruction;
+use crate::multicore::CpuCore;
 use crate::utils::bit;
 
 /// Flags set in the 'flags' member of the multiboot header.
@@ -112,26 +114,31 @@ pub fn boot_page_table() -> PageTable {
 }
 
 fn rust_tmp_main(magic: usize, mboot_ptr: usize) {
-    crate::clear_bss();
+    super::clear_bss();
     #[cfg(feature = "graphic")]
-    if let Some(mboot) = use_multiboot(mboot_ptr as _)  {
+    if let Some(mboot) = use_multiboot(mboot_ptr as _) {
         if let Some(ft) = mboot.framebuffer_table() {
-            crate::components::debug_console::init_fb(ft.addr as _, ft.width as _, ft.height as _, ft.pitch as _);
+            debug_console::init_fb(ft.addr as _, ft.width as _, ft.height as _, ft.pitch as _);
         } else {
-            crate::components::debug_console::init_vga();
+            debug_console::init_vga();
         }
     }
-    crate::components::debug_console::init_com();
+
+    CpuCore::init(hart_id());
+
+    debug_console::init_com();
     #[cfg(feature = "logger")]
-    crate::components::debug_console::DebugConsole::log_init();
-    crate::components::arch::idt::init();
-    crate::components::arch::apic::init();
+    debug_console::DebugConsole::log_init();
+
+    // Init PerCPU Information.
+    arch::idt::init();
+    arch::apic::init();
     // Init allocator
     set_local_thread_pointer(hart_id());
-    crate::components::arch::gdt::init();
+    arch::gdt::init();
     #[cfg(feature = "trap")]
     crate::components::trap::init_syscall();
-    crate::components::timer::init_early();
+    timer::init_early();
 
     // enable avx extend instruction set and sse if support avx
     // TIPS: QEMU not support avx, so we can't enable avx here
@@ -215,7 +222,7 @@ fn rust_tmp_main(magic: usize, mboot_ptr: usize) {
     display_info!("Boot HART ID", "{:#x}", CPU_ID.read_current());
     display_info!();
 
-    unsafe { crate::components::boot::_main_for_arch(0) };
+    unsafe { crate::components::boot::_main_for_arch(hart_id()) };
 
-    Instruction::shutdown()
+    instruction::shutdown()
 }
diff --git a/src/components/consts/riscv64.rs b/src/components/consts/riscv64.rs
index c55c2e8..6ad53ca 100644
--- a/src/components/consts/riscv64.rs
+++ b/src/components/consts/riscv64.rs
@@ -1,13 +1,3 @@
-/// Every core has a unique area of memory.
-/// Just using pagetable to map multi core area.
-/// Area size: 0x100_0000 (16MBytes)
-///
-/// First Area is 0xFFFF_FFC2_0000_0000
-/// Next Area is 0xFFFF_FFC2_0100_0000
-/// Others Same as This, so it will support 16 * 16 = 256 cores (Only auxiliary Harts).
-pub const MULTI_CORE_AREA: usize = 0xFFFF_FFC2_0000_0000;
-pub const MULTI_CORE_AREA_SIZE: usize = 0x100_0000;
-
 impl super::ConfigTrait for super::GenericConfig {
     const VIRT_ADDR: usize = 0xffff_ffc0_0000_0000;
 }
diff --git a/src/components/instruction/aarch64.rs b/src/components/instruction/aarch64.rs
index 13263de..da25484 100644
--- a/src/components/instruction/aarch64.rs
+++ b/src/components/instruction/aarch64.rs
@@ -1 +1,8 @@
-mod shutdown;
+include!("aarch64/shutdown.rs");
+
+#[inline]
+pub fn ebreak() {
+    unsafe {
+        core::arch::asm!("brk 0");
+    }
+}
diff --git a/src/components/instruction/aarch64/shutdown.rs b/src/components/instruction/aarch64/shutdown.rs
index c679457..a2929fe 100644
--- a/src/components/instruction/aarch64/shutdown.rs
+++ b/src/components/instruction/aarch64/shutdown.rs
@@ -1,9 +1,7 @@
-use crate::components::{arch::psci, instruction::Instruction};
+use crate::components::arch::psci;
 
-impl Instruction {
-    /// Close the computer. Call PSCI.
-    #[inline]
-    pub fn shutdown() -> ! {
-        psci::system_off()
-    }
+/// Close the computer. Call PSCI.
+#[inline]
+pub fn shutdown() -> ! {
+    psci::system_off()
 }
diff --git a/src/components/instruction/loongarch64.rs b/src/components/instruction/loongarch64.rs
index ca32c8d..566377a 100644
--- a/src/components/instruction/loongarch64.rs
+++ b/src/components/instruction/loongarch64.rs
@@ -1,18 +1,14 @@
-use crate::components::instruction::Instruction;
-
-impl Instruction {
-    #[inline]
-    pub fn ebreak() {
-        unsafe {
-            core::arch::asm!("break 2");
-        }
+#[inline]
+pub fn ebreak() {
+    unsafe {
+        core::arch::asm!("break 2");
     }
+}
 
-    #[inline]
-    pub fn shutdown() -> ! {
-        log::warn!("Shutting down on loongarch64 platform was not implemented!");
-        loop {
-            unsafe { loongArch64::asm::idle() };
-        }
+#[inline]
+pub fn shutdown() -> ! {
+    log::warn!("Shutting down on loongarch64 platform was not implemented!");
+    loop {
+        unsafe { loongArch64::asm::idle() };
     }
 }
diff --git a/src/components/instruction/mod.rs b/src/components/instruction/mod.rs
index d843b3e..8a370d1 100644
--- a/src/components/instruction/mod.rs
+++ b/src/components/instruction/mod.rs
@@ -3,9 +3,8 @@
 //! This module contains the instruction of the different architectures.
 //!
 
+use crate::pub_use_arch;
+
 super::define_arch_mods!();
 
-/// Platform Instruction
-/// [Instruction::ebreak] Intruction Breakpoint
-///
-pub struct Instruction;
+pub_use_arch!(shutdown, ebreak);
diff --git a/src/components/instruction/riscv64.rs b/src/components/instruction/riscv64.rs
index 45b0329..5a43c98 100644
--- a/src/components/instruction/riscv64.rs
+++ b/src/components/instruction/riscv64.rs
@@ -1,13 +1,18 @@
-mod shutdown;
-use crate::components::instruction::Instruction;
+include!("riscv64/shutdown.rs");
 
-impl Instruction {
-    #[inline]
-    pub fn hlt() {
-        unsafe {
-            riscv::register::sstatus::clear_sie();
-            riscv::asm::wfi();
-            riscv::register::sstatus::set_sie();
-        }
+/// Riscv64 ebreak instruction.
+#[inline]
+pub fn ebreak() {
+    unsafe {
+        riscv::asm::ebreak();
+    }
+}
+
+#[inline]
+pub fn hlt() {
+    unsafe {
+        riscv::register::sstatus::clear_sie();
+        riscv::asm::wfi();
+        riscv::register::sstatus::set_sie();
     }
 }
diff --git a/src/components/instruction/riscv64/shutdown.rs b/src/components/instruction/riscv64/shutdown.rs
index 12a7d9e..ccff0ab 100644
--- a/src/components/instruction/riscv64/shutdown.rs
+++ b/src/components/instruction/riscv64/shutdown.rs
@@ -1,11 +1,8 @@
-use crate::components::instruction::Instruction;
-
-impl Instruction {
-    /// Call SBI_SHUTDOWN to close the machine. Exit qemu if you are using qemu.
-    #[inline]
-    pub fn shutdown() -> ! {
-        // sbi_rt::legacy::shutdown();
-        sbi_rt::system_reset(sbi_rt::Shutdown, sbi_rt::NoReason);
-        unreachable!()
-    }
-}
+ /// Call SBI_SHUTDOWN to close the machine. Exit qemu if you are using qemu.
+ #[inline]
+ pub fn shutdown() -> ! {
+     // sbi_rt::legacy::shutdown();
+     sbi_rt::system_reset(sbi_rt::Shutdown, sbi_rt::NoReason);
+     unreachable!()
+ }
+ 
\ No newline at end of file
diff --git a/src/components/instruction/x86_64.rs b/src/components/instruction/x86_64.rs
index 13263de..164dc27 100644
--- a/src/components/instruction/x86_64.rs
+++ b/src/components/instruction/x86_64.rs
@@ -1 +1,8 @@
-mod shutdown;
+include!("x86_64/shutdown.rs");
+
+/// Riscv64 ebreak instruction.
+pub fn ebreak() {
+    unsafe {
+        core::arch::asm!("int 3");
+    }
+}
diff --git a/src/components/instruction/x86_64/shutdown.rs b/src/components/instruction/x86_64/shutdown.rs
index b581f2b..d16b862 100644
--- a/src/components/instruction/x86_64/shutdown.rs
+++ b/src/components/instruction/x86_64/shutdown.rs
@@ -1,11 +1,7 @@
 use x86_64::instructions::port::PortWriteOnly;
 
-use crate::components::instruction::Instruction;
-
-impl Instruction {
-    #[inline]
-    pub fn shutdown() -> ! {
-        unsafe { PortWriteOnly::new(0x604).write(0x2000u16) };
-        loop {}
-    }
-}
\ No newline at end of file
+#[inline]
+pub fn shutdown() -> ! {
+    unsafe { PortWriteOnly::new(0x604).write(0x2000u16) };
+    loop {}
+}
diff --git a/src/components/irq/loongarch64.rs b/src/components/irq/loongarch64.rs
index b45e70f..38247ed 100644
--- a/src/components/irq/loongarch64.rs
+++ b/src/components/irq/loongarch64.rs
@@ -1,5 +1,7 @@
 use crate::components::irq::IRQ;
 
+/// Timer IRQ of loongarch64
+pub const TIMER_IRQ: usize = 11;
 
 /// Implement IRQ operations for the IRQ interface.
 impl IRQ {
diff --git a/src/components/mod.rs b/src/components/mod.rs
index df5e39a..dbc3b99 100644
--- a/src/components/mod.rs
+++ b/src/components/mod.rs
@@ -12,7 +12,6 @@ pub mod irq;
 pub mod kcontext;
 pub mod macros;
 pub mod mem;
-#[cfg(feature = "multicore")]
 pub mod multicore;
 pub mod pagetable;
 pub mod percpu;
diff --git a/src/components/multicore/aarch64.rs b/src/components/multicore/aarch64.rs
index 661d421..1cd88c3 100644
--- a/src/components/multicore/aarch64.rs
+++ b/src/components/multicore/aarch64.rs
@@ -1,11 +1,4 @@
-use crate::components::multicore::MultiCore;
-
 // TODO: Boot a core with top pointer of the stack
 pub fn boot_core(_hart_id: usize, _sp_top: usize) {
     log::error!("Boot Core is not implemented yet for aarch64");
 }
-
-impl MultiCore {
-    /// Boot application cores
-    pub fn boot_all() {}
-}
diff --git a/src/components/multicore/loongarch64.rs b/src/components/multicore/loongarch64.rs
index 663d322..f82fe45 100644
--- a/src/components/multicore/loongarch64.rs
+++ b/src/components/multicore/loongarch64.rs
@@ -1,20 +1,8 @@
 use loongArch64::ipi::{csr_mail_send, send_ipi_single};
 
-use crate::{boot::BOOT_STACK, components::multicore::MultiCore};
-
 // TODO: Boot a core with top pointer of the stack
 pub fn boot_core(hart_id: usize, sp_top: usize) {
     csr_mail_send(crate::components::boot::_start_secondary as _, hart_id, 0);
     csr_mail_send(sp_top as _, hart_id, 1);
     send_ipi_single(1, 1);
 }
-
-impl MultiCore {
-    pub fn boot_all() {
-        // Stack Pointer.
-        let stack_ptr = unsafe { BOOT_STACK.as_ptr() as u64 + BOOT_STACK.len() as u64 };
-        csr_mail_send(crate::components::boot::_start_secondary as _, 1, 0);
-        csr_mail_send(stack_ptr, 1, 1);
-        send_ipi_single(1, 1);
-    }
-}
diff --git a/src/components/multicore/mod.rs b/src/components/multicore/mod.rs
index a2ea835..b176a64 100644
--- a/src/components/multicore/mod.rs
+++ b/src/components/multicore/mod.rs
@@ -9,7 +9,7 @@
 //! This function will allocate the stack and map it for itself.
 //!
 //! ```rust
-//! Multicore::boot_all();
+//! boot_core(hart_id, sp_top);
 //! ```
 //!
 //! Here will have more functionality about multicore in the future.
@@ -17,16 +17,16 @@
 
 use crate::{pub_use_arch, utils::MutexNoIrq};
 
-pub struct MultiCore;
-
 static CORE_SET: MutexNoIrq<u64> = MutexNoIrq::new(0);
 
 pub struct CpuCore;
 
 /// Initialize the core with boot_hart_id
-pub(crate) fn init(boot_hart_id: usize) {
-    let mut set = CORE_SET.lock();
-    *set |= 1 << boot_hart_id;
+impl CpuCore {
+    pub(crate) fn init(boot_hart_id: usize) {
+        let mut set = CORE_SET.lock();
+        *set |= 1 << boot_hart_id;
+    }
 }
 
 super::define_arch_mods!();
diff --git a/src/components/multicore/riscv64.rs b/src/components/multicore/riscv64.rs
index e723509..428bb17 100644
--- a/src/components/multicore/riscv64.rs
+++ b/src/components/multicore/riscv64.rs
@@ -1,12 +1,6 @@
-use crate::{
-    boot::secondary_start,
-    common::{frame_alloc, CPU_ID, CPU_NUM},
-    consts::{MULTI_CORE_AREA, MULTI_CORE_AREA_SIZE, VIRT_ADDR_START},
-    multicore::MultiCore,
-    MappingFlags, MappingSize, PageTable,
-};
+use crate::{boot::secondary_start, common::CPU_ID, consts::VIRT_ADDR_START};
 
-// TODO: Boot a core with top pointer of the stack
+// Boot a core with top pointer of the stack
 pub fn boot_core(cpu: usize, sp_top: usize) {
     if cpu == CPU_ID.read_current() {
         return;
@@ -17,49 +11,8 @@ pub fn boot_core(cpu: usize, sp_top: usize) {
 
     log::info!("secondary addr: {:#x}", secondary_start as usize);
     let ret = sbi_rt::hart_start(cpu, aux_core_func, sp_top);
-    if ret.is_ok() {
-        log::info!("hart {} Startting successfully", cpu);
-    } else {
-        log::warn!("hart {} Startting failed", cpu)
-    }
-}
-
-/// Implement the function for multicore
-impl MultiCore {
-    /// Boot all application cores.
-    pub fn boot_all() {
-        use crate::addr::VirtPage;
-        use crate::components::boot::secondary_start;
-
-        let page_table = PageTable::current();
-
-        (0..*CPU_NUM).into_iter().for_each(|cpu| {
-            if cpu == CPU_ID.read_current() {
-                return;
-            };
-
-            // PERCPU DATA ADDRESS RANGE END
-            let cpu_addr_end = MULTI_CORE_AREA + (cpu + 1) * MULTI_CORE_AREA_SIZE;
-            let aux_core_func = (secondary_start as usize) & (!VIRT_ADDR_START);
-
-            // Ready to build multi core area.
-            // default stack size is 512K
-            for i in 0..128 {
-                page_table.map_kernel(
-                    VirtPage::from_addr(cpu_addr_end - i * PageTable::PAGE_SIZE - 1),
-                    frame_alloc(),
-                    MappingFlags::RWX | MappingFlags::G,
-                    MappingSize::Page4KB,
-                )
-            }
-
-            log::info!("secondary addr: {:#x}", secondary_start as usize);
-            let ret = sbi_rt::hart_start(cpu, aux_core_func, cpu_addr_end);
-            if ret.is_ok() {
-                log::info!("hart {} Startting successfully", cpu);
-            } else {
-                log::warn!("hart {} Startting failed", cpu)
-            }
-        });
+    match ret.is_ok() {
+        true => log::info!("hart {} Startting successfully", cpu),
+        false => log::warn!("hart {} Startting failed", cpu),
     }
 }
diff --git a/src/components/multicore/x86_64.rs b/src/components/multicore/x86_64.rs
index 3e99aa3..1cd88c3 100644
--- a/src/components/multicore/x86_64.rs
+++ b/src/components/multicore/x86_64.rs
@@ -1,10 +1,4 @@
-use crate::components::multicore::MultiCore;
-
 // TODO: Boot a core with top pointer of the stack
 pub fn boot_core(_hart_id: usize, _sp_top: usize) {
     log::error!("Boot Core is not implemented yet for aarch64");
 }
-
-impl MultiCore {
-    pub fn boot_all() {}
-}
diff --git a/src/components/trap/aarch64.rs b/src/components/trap/aarch64.rs
index 22fb79e..dcd211b 100644
--- a/src/components/trap/aarch64.rs
+++ b/src/components/trap/aarch64.rs
@@ -3,7 +3,6 @@ use core::arch::{asm, global_asm};
 use aarch64_cpu::registers::{Writeable, ESR_EL1, FAR_EL1, VBAR_EL1};
 use tock_registers::interfaces::Readable;
 
-use crate::components::instruction::Instruction;
 use crate::components::irq::{get_irq, TIMER_IRQ_NUM};
 use crate::components::timer::set_next_timer;
 use crate::components::trapframe::TrapFrame;
@@ -56,8 +55,6 @@ fn handle_exception(tf: &mut TrapFrame, kind: TrapKind, source: TrapSource) -> T
     let esr = ESR_EL1.extract();
     let trap_type = match esr.read_as_enum(ESR_EL1::EC) {
         Some(ESR_EL1::EC::Value::Brk64) => {
-            let iss = esr.read(ESR_EL1::ISS);
-            log::debug!("BRK #{:#x} @ {:#x} ", iss, tf.elr);
             tf.elr += 4;
             TrapType::Breakpoint
         }
@@ -156,12 +153,3 @@ pub fn run_user_task(cx: &mut TrapFrame) -> EscapeReason {
     let trap_kind = user_restore(cx);
     handle_exception(cx, trap_kind, TrapSource::LowerAArch64).into()
 }
-
-/// Implement the instructions for the riscv
-impl Instruction {
-    /// ebreak instruction to trigger the breakpoint exception.
-    #[inline]
-    pub fn ebreak() {
-        unsafe { asm!("brk 0") }
-    }
-}
diff --git a/src/components/trap/loongarch64.rs b/src/components/trap/loongarch64.rs
index 4991670..57075d5 100644
--- a/src/components/trap/loongarch64.rs
+++ b/src/components/trap/loongarch64.rs
@@ -11,6 +11,7 @@ use unaligned::emulate_load_store_insn;
 use crate::components::trapframe::TrapFrame;
 
 use crate::components::trap::{EscapeReason, TrapType};
+use crate::irq::TIMER_IRQ;
 
 global_asm!(
     r"
@@ -179,13 +180,6 @@ pub fn disable_irq() {
     prmd::set_pie(false);
 }
 
-#[inline(always)]
-pub fn enable_external_irq() {
-    // unsafe {
-    //     sie::set_sext();
-    // }
-}
-
 pub fn run_user_task(cx: &mut TrapFrame) -> EscapeReason {
     user_restore(cx);
     loongarch64_trap_handler(cx).into()
@@ -305,7 +299,6 @@ fn loongarch64_trap_handler(tf: &mut TrapFrame) -> TrapType {
     let estat = estat::read();
     let trap_type = match estat.cause() {
         Trap::Exception(Exception::Breakpoint) => {
-            log::debug!("Exception(Breakpoint) @ {:#x} ", tf.era);
             tf.era += 4;
             TrapType::Breakpoint
         }
@@ -318,7 +311,7 @@ fn loongarch64_trap_handler(tf: &mut TrapFrame) -> TrapType {
             let irq_num: usize = estat.is().trailing_zeros() as usize;
             match irq_num {
                 // TIMER_IRQ
-                11 => {
+                TIMER_IRQ => {
                     ticlr::clear_timer_interrupt();
                     TrapType::Timer
                 }
@@ -330,17 +323,17 @@ fn loongarch64_trap_handler(tf: &mut TrapFrame) -> TrapType {
         | Trap::Exception(Exception::PageModifyFault) => {
             TrapType::StorePageFault(badv::read().vaddr())
         }
-        Trap::Exception(Exception::PageNonReadableFault)
-        | Trap::Exception(Exception::PageNonExecutableFault) => {
-            // info!("page none readable: {tf:#x?}");
-            // let badv = badv::read().vaddr();
-
-            // TrapType::Un
-            TrapType::StorePageFault(badv::read().vaddr())
+        Trap::Exception(Exception::PageNonExecutableFault)
+        | Trap::Exception(Exception::FetchPageFault) => {
+            TrapType::InstructionPageFault(badv::read().vaddr())
         }
-        Trap::Exception(Exception::FetchPageFault) | Trap::Exception(Exception::LoadPageFault) => {
+        // Load Fault
+        Trap::Exception(Exception::LoadPageFault)
+        | Trap::Exception(Exception::PageNonReadableFault) => {
             TrapType::LoadPageFault(badv::read().vaddr())
         }
+        Trap::MachineError(_) => todo!(),
+        Trap::Unknown => todo!(),
         _ => {
             panic!(
                 "Unhandled trap {:?} @ {:#x} BADV: {:#x}:\n{:#x?}",
diff --git a/src/components/trap/x86_64.rs b/src/components/trap/x86_64.rs
index 43f33be..b720174 100644
--- a/src/components/trap/x86_64.rs
+++ b/src/components/trap/x86_64.rs
@@ -11,7 +11,6 @@ use x86::{controlregs::cr2, irq::*};
 use crate::components::arch::apic::{local_apic, vectors::*};
 use crate::components::arch::gdt::{set_tss_kernel_sp, GdtStruct};
 use crate::components::consts::{PIC_VECTOR_OFFSET, SYSCALL_VECTOR};
-use crate::components::instruction::Instruction;
 use crate::components::irq;
 use crate::components::trapframe::{FxsaveArea, TrapFrame, TRAPFRAME_SIZE};
 use crate::components::percpu::PerCPUReserved;
@@ -65,7 +64,6 @@ fn kernel_callback(context: &mut TrapFrame) {
     let trap_type = match context.vector as u8 {
         PAGE_FAULT_VECTOR => {
             let pflags = PageFaultFlags::from_bits_truncate(context.rflags as _);
-            // debug!("flags: {:#x?} cx_ref: {:#x?}", pflags, context);
             if pflags.contains(PageFaultFlags::I) {
                 TrapType::InstructionPageFault(unsafe { cr2() })
             } else if pflags.contains(PageFaultFlags::W) {
@@ -74,10 +72,7 @@ fn kernel_callback(context: &mut TrapFrame) {
                 TrapType::LoadPageFault(unsafe { cr2() })
             }
         }
-        BREAKPOINT_VECTOR => {
-            log::debug!("#BP @ {:#x} ", context.rip);
-            TrapType::Breakpoint
-        }
+        BREAKPOINT_VECTOR => TrapType::Breakpoint,
         GENERAL_PROTECTION_FAULT_VECTOR => {
             panic!(
                 "#GP @ {:#x}, fault_vaddr={:#x} error_code={:#x}:\n{:#x?}",
@@ -410,10 +405,3 @@ pub fn run_user_task(context: &mut TrapFrame) -> EscapeReason {
         }
     }
 }
-
-impl Instruction {
-    #[inline]
-    pub fn ebreak() {
-        unsafe { core::arch::asm!("int 3") }
-    }
-}
diff --git a/src/lib.rs b/src/lib.rs
index 3eee953..562cdae 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -105,8 +105,6 @@
 //!
 //! [Barrier](mem::Barrier): Memory barrier operations.
 //!
-//! [MultiCore](multicore::MultiCore): MultiCore operations. Now only [multicore::MultiCore::boot_all] is available.
-//!
 //! [PageTable]: PageTable and its associated functions.
 //!
 //! [MappingFlags](pagetable::MappingFlags): MappingFlags, This is an abstraction of pagetable flags.
@@ -153,7 +151,6 @@ pub use components::*;
 pub(crate) mod drivers;
 pub mod time;
 pub mod utils;
-use core::mem::size_of;
 
 #[cfg(feature = "boot")]
 pub use polyhal_macro::arch_entry;
@@ -162,24 +159,9 @@ pub use polyhal_macro::arch_interrupt;
 
 // Re export the Module like Structure.
 pub use addr::{PhysAddr, PhysPage, VirtAddr, VirtPage};
-// pub use multicore::MultiCore;
 pub use components::pagetable::{MappingFlags, MappingSize, PageTable, PageTableWrapper};
 pub use time::Time;
 
-pub(crate) fn clear_bss() {
-    extern "C" {
-        fn _sbss();
-        fn _ebss();
-    }
-    unsafe {
-        core::slice::from_raw_parts_mut(
-            _sbss as usize as *mut u128,
-            (_ebss as usize - _sbss as usize) / size_of::<u128>(),
-        )
-        .fill(0);
-    }
-}
-
 #[cfg(test)]
 pub mod tests {
     use crate::api::frame_alloc;